Semiconductor device and method for writing data into memory
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorHajime TOKUNAGA
Life of this patent
Estimating the term…
Abstract
It is an object to provide memory and a semiconductor device in which falsification of data written thereinto is prevented. The memory includes a memory circuit, a writing circuit, and a reading circuit. The memory circuit has a memory cell array in which a plurality of memory cells where “0” and “1” of binary data can be written are arranged. The writing circuit includes a first writing circuit which writes one of “0” and “1” of binary data into one of the memory cells included in the memory circuit, and a second writing circuit which writes the other of “0” and “1” of binary data into one of the memory cells included in the memory circuit.
Claims11
A semiconductor device comprising:
- a memory circuit including a memory cell array in which a plurality of memory cells into which “0” and “1” of binary data can be written are arranged;
- a first writing circuit which writes one of “0” and “1” of binary data into one of the memory cells included in the memory circuit;
- a second writing circuit which writes the other of “0” and “1” of binary data into one of the memory cells included in the memory circuit;
- and
- a reading circuit which reads binary data which is written into one of the memory cells included in the memory circuit,
- wherein the memory cell has an antifuse in one state selected from “a first state” which is an initial state, “a second state” which is obtained by writing operation into an antifuse in “the first state” by the first writing circuit, or “a third state” which is obtained by writing operation into an antifuse in “the first state” by the second writing circuit;
- and
- wherein “the second state” or “the third state” of the antifuse corresponds to “0” or “1” of binary data.
A method for writing data into memory,
- wherein memory includes a memory circuit having a memory cell array where a plurality of memory cells provided with an antifuse, into which “0” and “1” of binary data can be written, are arranged;
- a first writing circuit;
- and a second writing circuit;
- wherein in a case of writing one of “0” and “1” of binary data into one of the memory cells included in the memory circuit, the state of the antifuse in “a first state” is changed to “a second state” by performing writing operation on the antifuse in “the first state” by the first writing circuit;
- and
- wherein in a case of writing the other of “0” and “1” of binary data into one of the memory cells included in the memory circuit, the state of the antifuse in “the first state” is changed to “a third state” by performing writing operation on the antifuse in “the first state” by the second writing circuit.
Dependencies are inferred from the claim text.