Memory system and control method for memory

A memory system comprising:

• a semiconductor memory that includes an internal circuit, which operates according to a first power supply voltage, and a memory input/output circuit, which is coupled to the internal circuit and operates according to a second power supply voltage, where the semiconductor memory operates in synchronization with a clock signal;
• a first control unit that includes a control input/output circuit, which is coupled to the memory input/output circuit and operates according to the second power supply voltage, where the first control unit operates in synchronization with the clock signal;
• a voltage generating unit that generates the second power supply voltage and changes the second power supply voltage according to a voltage adjustment signal;
• a clock generating unit that generates the clock signal and changes the frequency of the clock signal according to a clock adjustment signal;
• and
• a second control unit that generates the voltage adjustment signal and the clock adjustment signal according to an access state of the semiconductor memory by the first control unit.