Cluster based non-volatile memory translation layer
AssigneeMicron Technology, Inc.
InventorsWanmo Wong, Mark Jahn, Frank Sepulveda
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorsWanmo Wong, Mark Jahn, Frank Sepulveda
Estimating the term…
An improved non-volatile memory and logical block to physical block address translation method utilizing a cluster based addressing scheme is detailed. The translation of logical blocks/sectors to the physical blocks/sectors is necessary for a non-volatile memory to appear as a freely rewriteable device to a system or processor. Embodiments of the present invention utilize cluster based address translation to translate logical block addresses to physical block addresses, wherein each cluster contains a plurality of sequentially addressed logical blocks. This allows the use of a smaller RAM table for the address translation lookup and/or faster scanning of the memory device or memory subsystem for the matching cluster address. In one embodiment, a specially formatted cluster is utilized for frequently updated sectors/logical blocks, where the cluster stores a single logical block and a new sequential physical block of the cluster is written in turn with each update.
A Flash memory device comprising:
A system comprising:
A method of operating a non-volatile memory comprising:
A method of translating a logical block address to a physical address in a non-volatile memory comprising:
Dependencies are inferred from the claim text.