Sense amplifier for low-supply-voltage nonvolatile memory cells
OwnerMarco Pasotti, Guido De Sandre +2inventors
InventorsMarco Pasotti, Guido De Sandre, David Iezzi, Marco Poles
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Abstract
A sense amplifier for nonvolatile memory cells includes a reference cell, a first load, connected to the reference cell, and a second load, connectable to a nonvolatile memory cell, both the first load and the second load having controllable resistance; a control circuit of the first load and of the second load supplies the first load and the second load with a control voltage irrespective of an operating voltage between a first conduction terminal and a second conduction terminal of the first load.
Claims16
A nonvolatile storage device comprising:
- a plurality of memory cells;
- and
- a sense amplifier including:
- a first load coupled in series with a reference cell, between the reference memory cell and a supply voltage;
- a second load selectively connectable to at least one memory cell of the plurality of memory cells;
- and
- a control circuit configured to apply a control voltage to the first load and the second load, independent of an operating voltage across the first load, and in response to a voltage at a node between the first load and the reference cell to provide a reading current to the reference cell during a reading of the at least one memory cell.
A method comprising:
- providing a first load coupled in series with a reference cell, between the reference memory cell and a supply voltage;
- providing a second load selectively connectable to at least one memory cell of the plurality of memory cells;
- and
- applying a control voltage to a first load and a second load, independent of an operating voltage across the first load, and in response to a voltage at a node between the first load and the reference cell to provide a reading current to the reference cell during a reading of the at least one memory cell.
The method of claim 16, further comprising outputting a signal indicative of the difference between a voltage at a node between the first load and the reference cell with a voltage at a node between the second load and the memory cell
Dependencies are inferred from the claim text.