Nand flash memory devices having wiring with integrally-formed contact pads and dummy lines and methods of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJang-ho Park, Jae-kwan Park, Dong-hwa Kwak, So-wi Jin, Byung-jun Hwang, Nam-su Lim
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Abstract
A NAND flash memory device includes a plurality of continuous conductors disposed on a common level of a multilayer substrate, the plurality of continuous conductors including respective conductive lines extending in parallel along a first direction, respective contact pads disposed at ends of the respective conductive lines and respective conductive dummy lines extending in parallel from the contact pads along a second direction
Claims27
A NAND flash memory device comprising:
- a plurality of continuous conductors disposed on a common level of a multilayer substrate, the plurality of continuous conductors comprising respective conductive lines extending in parallel along a first direction, respective contact pads disposed at ends of the respective conductive lines and respective conductive dummy lines extending in parallel from the contact pads along a second direction.
A NAND flash memory device comprising:
- a first plurality of continuous conductors disposed on a common level of a multilayer substrate, the plurality of first continuous conductors comprising respective first conductive lines extending in parallel along a first direction, respective first contact pads disposed at ends of the respective first conductive lines and respective first conductive dummy lines extending in parallel from the first contact pads along a second direction;
- and
- a second plurality of continuous conductors disposed adjacent the first plurality of continuous conductors on the common level of the multilayer substrate, the plurality of second continuous conductors comprising respective second conductive lines extending in parallel along the first direction, respective second contact pads disposed at ends of the respective second conductive lines and respective second conductive dummy lines extending in parallel from the second contact pads along the second direction, wherein the second plurality of continuous conductors is a mirror image of the first plurality of continuous conductors about an axis of symmetry therebetween.
A method of manufacturing a NAND flash memory device, the method comprising:
- forming a conductive layer on a semiconductor substrate;
- forming a plurality of first mask patterns on the substrate, the first mask patterns comprising first linear portions extending in parallel along a first direction and second linear portions extending in parallel from respective ends of the first linear portions along a second direction;
- forming sidewall spacers on sidewalls of the mask patterns;
- forming second mask patterns covering portions of the first mask patterns and the sidewall spacers proximate corners at which the first linear portions and the second linear portions of the first mask patterns meet;
- etching the first mask patterns using the second mask patterns as an etching mask to remove portions of the first mask patterns not covered by the second mask patterns and to leave the sidewall spacers and portions of the first mask patterns underlying the second mask patterns;
- etching the conductive layer using the sidewall spacers and the remaining portions of the first mask patterns as etching masks to form a plurality of continuous conductors comprising respective conductive lines extending in parallel along the first direction, respective contact pads disposed at ends of the respective conductive lines and respective conductive dummy lines extending in parallel from the contact pads along the second direction.
Dependencies are inferred from the claim text.