Method and device for demultiplexing a crossbar non-volatile memory

A method, comprising:

• forming a crossbar non-volatile memory device, the forming including:
• forming a first array of addressable row nano-wires, the nano-wires of the first array having respective thicknesses that differ from one another and vary from a smallest thickness to a largest thickness;
• forming a second array of addressable column nano-wires crossing said addressable row nano-wires at a plurality of cross-points hosting a plurality of memory cells, the nano-wires of the second array having respective thicknesses that differ from one another and vary from a smallest thickness to a largest thickness;
• forming a first electrode and a second electrode respectively crossing said row nano-wires and said column nano-wires;
• and
• forming a first contact and a second contact electrically contacting respectively said row nano-wires and said column nano-wires.

A crossbar non-volatile memory device, comprising:

• a first array of addressable row nano-wires, the nano-wires of the first array having respective heights that differ from one another and vary from a smallest height to a largest height;
• a second array of addressable column nano-wires crossing said addressable row nano-wires at a plurality of cross-points hosting a plurality of memory cells, the nano-wires of the second array having respective heights that differ from one another and vary from a smallest height to a largest height;
• a plurality of row transistors respectively coupled to said row nano-wires, each row transistor being configured to select a corresponding one of the row nano-wires, respectively;
• and
• a plurality of column transistors respectively coupled to said column nano-wires, each column transistor being configured to select a corresponding one of the column nano-wires, respectively.