Flash converter differential reference ladder auto-zero circuit
AssigneeKenet, Inc.
InventorDomenic F. Terranova
Life of this patent
Estimating the term…
Abstract
A differential reference ladder with an auto zero circuit that can be used as part of a flash analog to digital converter. The auto zero operation is performed relative to a common mode voltage of the ladder. The resistive ladder is disconnected from the rest of the circuit during auto zero mode. As a result, the auto zero adjustment is more accurate, since the offsets are stored under the same common mode connection as when the circuit is in a compare mode. This permits auto zeroing to proceed quickly unencumbered by the parasitic capacitance of the ladder or other components.
Claims20
An apparatus comprising:
- an array of comparators;
- a resistive ladder, comprising a plurality of resistors, for establishing a common mode voltage and two or more reference voltages;
- a plurality of buffers, for buffering the common mode voltage and reference voltages;
- a plurality of switches, disposed between the resistive ladder and output buffers, to isolate the resistive ladder in an auto zero mode, by coupling the buffer inputs to the common mode voltage in the auto zero mode;
- and
- at least one offset storage capacitor associated with each comparator for storing an auto zero offset voltage sampled in the auto zero mode.
A flash analog to digital converter apparatus comprising:
- a differential resistive ladder, for establishing a common mode voltage and two or more reference voltages;
- a plurality of buffers, for buffering the common mode voltage and differential reference voltages;
- a plurality of switches, disposed between the resistive ladder and output buffers, to isolate the resistive ladder in an auto zero mode, by coupling the buffer inputs to the common mode voltage;
- an array of differential comparators, each connected to receive a differential input signal sample and a differential pair of the reference voltages;
- and
- a pair of storage capacitors associated with each differential comparator, for storing a differential auto zero offset voltage sampled in the auto zero mode.
A method comprising:
- establishing a common mode voltage and two or more reference voltages at respective output nodes of a resistive voltage ladder;
- buffering the common mode voltage and reference voltages;
- comparing the buffered reference voltages and common mode voltage to an input signal sample;
- isolating the output nodes of the resistive ladder in an auto zero mode, by coupling the buffered reference voltages to the common mode voltage in the auto zero mode;
- and
- sampling an auto zero offset voltage in the auto zero mode.
A method of providing a flash analog to digital conversion result comprising:
- establishing a common mode voltage and two or more reference voltages at a differential ladder;
- buffering the common mode voltage and differential reference voltages at a plurality of buffers;
- operating a plurality of switches, disposed between the resistive ladder and output buffers, to isolate the resistive ladder in an auto zero mode, by coupling the buffer inputs to the common mode voltage;
- providing a plurality of differential comparison results, by comparing a differential input signal sample and a differential pair of the reference voltages;
- and
- storing a differential auto zero offset voltage sampled in the auto zero mode on a pair of storage capacitors.
Dependencies are inferred from the claim text.