Signal processing circuit comprising a sigma delta analog to digital converter

Abstract

A signal processing circuit comprising a sigma delta analog to digital converter with a feedback loop that comprises an analog filtering circuit (14) that has a controllable time constant. In a calibration mode a detector (18) detects a signal strength in a band (34) of frequencies at an output of the sigma delta analog to digital converter. A bandwidth control circuit (19) has an output coupled to a control input of the analog filtering circuit (14), and is arranged to control said time constant dependent on a signal strength in a band (34) of frequencies at the output of the sigma delta analog to digital converter. The band (34) of frequencies is selected so that noise shaped quantization noise density (32) of the sigma delta analog to digital converter rises with frequency. Thus, detection output depends on the time constant, shifts in the time constant affecting the rise of quantization noise. In this way a simple calibration of the time constant can be realized.

Dependencies are inferred from the claim text.