Rail to rail buffer amplifier
AssigneeFreescale Semiconductor, Inc.
InventorHiroyuki KIMURA
Life of this patent
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Abstract
A buffer amplifier having a wide output voltage range includes a first source follower circuit having a first current source and a first transistor, and a second source follower circuit having a second current source and a second transistor. The first source follower circuit has an output terminal connected to a gate of a third transistor and a source of a fourth transistor. The second source follower circuit has an output terminal connected to a gate of a fifth transistor and a source of a sixth transistor. First and second voltages are respectively supplied to the gates of the fourth and sixth transistors. The sixth transistor is operated in place of the fifth transistor in a low voltage range, and the fourth transistor is operated in place of the third transistor in a high voltage range.
Claims8
An amplifier circuit, comprising:
- first and second source follower circuits supplied with an input voltage;
- a first output transistor including a control terminal that receives an output of the first source follower circuit, and a first terminal, which is supplied with a power supply voltage;
- a second output transistor including a control terminal that receives an output of the second source follower circuit, and a first terminal, which is supplied with a base voltage;
- a first auxiliary transistor including a second terminal, which is connected to an output terminal of the first source follower circuit, and a control terminal, which receives a first bias voltage;
- a second auxiliary transistor including a second terminal, which is connected to an output terminal of the second source follower circuit, and a control terminal, which receives a second bias voltage;
- and
- an output means for outputting a voltage at a connection node of second terminals of the first and second output transistors and first terminals of the first and second auxiliary transistors.
An amplifier circuit for generating an output voltage, comprising:
- a first source follower circuit, connected between a power supply line and a ground line, having an input terminal that receives an input voltage;
- a second source follower circuit, connected between the power supply line and the ground line, having an input terminal that receives the input voltage;
- a first output transistor having a drain connected to the power supply line and a gate connected to an output terminal of the first source follower circuit;
- a second output transistor having a drain connected to the ground line and a gate connected to an output terminal of the second source follower circuit;
- a first auxiliary transistor having a source connected to the output terminal of the first source follower circuit, and a gate that receives a first bias voltage;
- and
- a second auxiliary transistor having a source connected to the output terminal of the second source follower circuit, and a gate that receives a second bias voltage, and wherein the output voltage is generated at a node connecting the sources of the first and second output transistors and the draings of the first and second auxiliary transistors.
Dependencies are inferred from the claim text.