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US 2009/0153234 A1Published application
Current mirror device and method
AssigneeSanDisk Corporation
InventorEKRAM HOSSAIN BHUIYAN
Life of this patent
Estimating the term…
Abstract
In an embodiment, a circuit is disclosed that includes a current mirror including a first transistor pair and a second transistor pair. The first transistor pair includes a first transistor and a second transistor. The second transistor pair includes cascode transistors. The circuit also includes an operational amplifier having an output coupled to both the first transistor and the second transistor.
Claims27
A circuit comprising:
- a current mirror including a first set of transistors and a second set of transistors, at least one of the transistors in the first set of transistors and at least one of the transistors in the second set of transistors in a cascode arrangement;
- a first operational amplifier coupled to the first set of transistors and including an input of a first bias voltage determined by a reference voltage circuit;
- and
- a second operational amplifier coupled to the second set of transistors and including an input of a second bias voltage determined by the reference voltage circuit.
1 more element
(canceled)
A circuit comprising:
- a current mirror including a first transistor pair and a second transistor pair, the first transistor pair including a first transistor and a second transistor, the second transistor pair including cascode transistors;
- and
- a first operational amplifier having an output coupled to both the first transistor and the second transistor and configured to provide an output current to a high speed analog circuit.
A circuit comprising:
- a current mirror including a first set of transistors and a second set of transistors, at least one transistor in the second set of transistors disposed in a cascode arrangement;
- a first operational. amplifier coupled to the first set of transistors;
- a second operational amplifier coupled to the second set of transistors;
- a current source coupled to one of the transistors of the second set of transistors;
- wherein the first operational amplifier has a first input of a first bias voltage and the second operational amplifier has a first input of a second bias voltage determined by a reference voltage circuit that sets the second bias voltage to one of a plurality of selectable voltage levels within a range of available voltages;
- wherein the first set of transistors is coupled to a supply voltage, wherein the first bias voltage is different than the supply voltage;
- wherein a first of the transistors of the second set of transistors is coupled to a second input to the first operational amplifier to define a first feedback loop;
- wherein an output of one of the transistors in the first set of transistors is provided as a second input to the second operational amplifier to define a second feedback loop;
- and
- wherein a second of the transistors of the second set of transistors has an output that drives an output current provided to a high speed analog circuit.
7 more elements
A method of using a circuit device, the method comprising:
- receiving a first bias voltage at a first input of a first operational amplifier coupled to a first set of transistors;
- receiving a second bias voltage at a first input of a second operational amplifier coupled to a second set of transistors, the first set of transistors and the second set of transistors forming a current mirror, the current mirror coupled to a supply voltage;
- wherein the first bias voltage differs from the supply voltage;
- wherein a first of the transistors in the second set of transistors is coupled to a second input of the first operational amplifier to define a first feedback loop;
- wherein an output of one of the transistors in the first set of transistors is provided as a second input to the second operational amplifier to define a second feedback loop;
- and
- wherein a second of the transistors of the second set of transistors has an output that drives an output current of the current mirror provided to a high speed analog circuit.
4 more elements
(canceled)
Dependencies are inferred from the claim text.