Bi-directional buffer for open-drain or open-collector bus

A system comprising:

• a first bus line segment;
• a second bus line segment;
• a first pull-up resistor connected between the first bus line segment and a high voltage rail;
• a second pull-up resistor connected between the second bus line segment and the high voltage rail;
• a first capacitance between the first bus line segment and a low voltage rail;
• a second capacitance between the second bus line segment and the low voltage rail;
• and
• a bi-directional buffer, connected between the first and second bus line segments, the bi-direction buffer comprising a differential input/differential output amplifier that includes a first input/output node and a second/input output node, first input/output node connected to the first bus line segment, the second input/output node connected to the second bus line segment;
• and
• wherein the differential input/differential output amplifier is configurable in a first configuration and a second configuration;
• wherein when the differential input/differential output amplifier is in the first configuration, the second input/output node follows the first input/output node;
• and
• wherein when the differential input/differential output amplifier is in the second configuration, the first input/output node follows the second input/output node.

A bi-directional buffer, comprising:

• first and second p-channel transistors connected as a differential input pair, wherein a control terminal of the first p-channel transistor is a first input/output node of the bi-direction buffer, and a control terminal of the second p-channel transistor is a second input/output node of the bi-direction buffer;
• third and fourth n-channel output stage transistors;
• a current mirror including an input and first and second outputs;
• wherein when the first input/output node goes low, the second output of the current mirror collapses, which pulls a control terminal of the third transistor toward ground, resulting in the second input/output node following the first input/output node;
• and
• wherein when the second input/output node goes low, the first output of the current mirror collapses, which pulls a control terminal of the fourth transistor toward ground, resulting in the first input/output node following the second input/output node.

A bi-directional buffer, comprising:

• a differential input amplifier having first and second inputs and first and second outputs;
• wherein only one of the first and second outputs is active at one time, with the other being inactive;
• wherein the active output is connected to its corresponding input, and the inactive output is disconnected from its corresponding input;
• wherein the second input follows the first input when the second output is active;
• and
• wherein the first input follow the second input when the first output is active.