Noise filter circuit, dead time circuit, delay circuit, noise filter method, dead time method, delay method, thermal head driver, and electronic instrument

A noise filter circuit comprising:

• a first delay circuit that receives an input signal;
• an AND circuit that receives the input signal and a signal output from the first delay circuit;
• an OR circuit that receives the input signal and the signal output from the first delay circuit;
• a latch circuit that receives signals based on a signal output from the AND circuit and a signal based on a signal output from the OR circuit as a set signal and a reset signal;
• a second delay circuit that receives the signal output from the AND circuit;
• and
• a third delay circuit that receives the signal output from the OR circuit,
• each of the second delay circuit and the third delay circuit including an inverter circuit;
• each of the inverter circuits including a first-conductivity-type transistor and a second-conductivity-type transistor, the capability of one of the first-conductivity-type transistor and the second-conductivity-type transistor being lower than the capability of the other of the first-conductivity-type transistor and the second-conductivity-type transistor;
• and
• the latch circuit receiving the signal based on the signal output from the AND circuit and the signal based on the signal output from the OR circuit through the second delay circuit and the third delay circuit.

A dead time circuit comprising:

• a first inverter circuit that receives a signal based on an input signal;
• and
• a second inverter circuit that receives a signal based on the input signal,
• each of the first inverter circuit and the second inverter circuit including a first-conductivity-type transistor and a second-conductivity-type transistor, the capability of one of the first-conductivity-type transistor and the second-conductivity-type transistor being lower than the capability of the other of the first-conductivity-type transistor and the second-conductivity-type transistor;
• and
• a combination of signals output from the first inverter circuit and the second inverter circuit forming a dead time.

A noise filter method comprising:

• providing an input signal;
• generating a first signal based on the input signal using a first inverter circuit, one of a rise time and a fall time of the first signal being longer than the other of the rise time and the fall time of the first signal;
• generating a second signal based on the input signal using a second inverter circuit, one of a rise time and a fall time of the second signal being longer than the other of the rise time and the fall time of the second signal;
• and
• inputting signals based on the first signal and a signal based on the second signal to a latch circuit as a set signal and a reset signal.

A noise filter method comprising:

• providing an input signal;
• delaying the input signal;
• inputting the input signal and the delayed signal to an AND circuit;
• inputting the input signal and the delayed signal to an OR circuit;
• inputting signals based on a signal output from the AND circuit and a signal based on a signal output from the OR circuit to a latch circuit as a set signal and a reset signal;
• generating a first signal based on a signal output from the AND circuit, one of a rise time and a fall time of the first signal being longer than the other of the rise time and the fall time of the first signal;
• and
• generating a second signal based on a signal output from the OR circuit, one of a rise time and a fall time of the second signal being longer than the other of the rise time and the fall time of the second signal.

A dead time method comprising:

• providing an input signal;
• generating a first signal based on the input signal using a first inverter circuit, one of a rise time and a fall time of the first signal being longer than the other of the rise time and the fall time of the first signal;
• and
• generating a second signal based on the input signal using a second inverter circuit, one of a rise time and a fall time of the second signal being longer than the other of the rise time and the fall time of the second signal,
• the first signal and the second signal forming a dead time.

A delay method comprising:

• providing an input signal;
• generating a first signal based on the input signal using a first inverter circuit, one of a rise time and a fall time of the first signal being longer than the other of the rise time and the fall time of the first signal;
• and
• generating a second signal based on the input signal using a second inverter circuit, one of a rise time and a fall time of the second signal being longer than the other of the rise time and the fall time of the second signal.