Pixel structure, display panel, eletro-optical apparatus, and method thererof

A method of manufacturing a pixel structure, the method comprising:

• providing a substrate;
• forming a gate and a bottom capacitor electrode on the substrate;
• forming a dielectric layer on the substrate to cover the gate and the bottom capacitor electrode;
• forming a semiconductor layer on the dielectric layer;
• patterning the semiconductor layer to form a channel layer on the dielectric layer above the gate and forming a patterned semiconductor layer on the dielectric layer above the bottom capacitor electrode;
• sequentially forming a barrier layer and a conductive layer on the channel layer, the dielectric layer, and the patterned semiconductor layer, wherein the material of the conductive layer comprises copper, a copper alloy, or combinations thereof;
• patterning the barrier layer and the conductive layer to form a source and a drain on the channel layer at respective sides of the gate and forming a copper-containing stacked layer on the semiconductor layer, such that the gate, the channel layer, the source and the drain constitute a thin film transistor, while the patterned semiconductor layer and the copper-containing stacked layer together form an upper capacitor electrode;
• forming a passivation layer on the thin film transistor and the upper capacitor electrode, wherein the passivation layer has a first opening exposing the drain;
• and
• forming a pixel electrode electrically connected to the thin film transistor through the first opening.

A pixel structure disposed on a substrate, the pixel structure comprising:

• a thin film transistor comprising a gate, a dielectric layer, a semiconductor layer, and a source/drain sequentially disposed on the substrate, such that the source and drain is disposed on a portion of the semiconductor layer, the source/drain having a barrier layer and a metal layer, the barrier layer being disposed on a portion of the semiconductor layer, the metal layer being disposed on the barrier layer, the barrier layer being in contact with the semiconductor layer and the metal layer, wherein the material of the metal layer comprises copper, a copper alloy, or a combination thereof;
• a passivation layer covering the thin film transistor and the dielectric layer and having a first opening exposing the drain/source;
• and
• a pixel electrode disposed on the passivation layer and electrically connected to the thin film transistor through the first opening.

A method of manufacturing a pixel structure, the method comprising:

• providing a substrate;
• sequentially disposing a gate, a dielectric layer, a channel layer, and a source/drain on the substrate, such that a thin film transistor is formed and the source and drain is disposed on a portion of a semiconductor layer, the source/drain having a barrier layer and a metal layer, the barrier layer being disposed on a portion of the semiconductor layer, the metal layer being disposed on the barrier layer, the barrier layer being in contact with the semiconductor layer and the metal layer, wherein the material of the metal layer comprises copper, a copper alloy, or a combination thereof;
• covering a passivation layer on the thin film transistor and the dielectric layer, wherein the passivation layer has a first opening exposing the drain/source;
• and
• disposing a pixel electrode on the passivation layer, the pixel electrode electrically connected to the thin film transistor through the first opening.