Leadframe having die attach pad with delamination and crack-arresting features
AssigneeNational Semiconductor Corporation
InventorsLuu T. NGUYEN, Vijaylaxmi GUMASTE
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AssigneeNational Semiconductor Corporation
InventorsLuu T. NGUYEN, Vijaylaxmi GUMASTE
Estimating the term…
One aspect of the invention pertains to a semiconductor package having a die and a die attach pad with a plurality of spaced apart pedestals supported by a web. A die is mounted on the die attach pad such that the die is supported by at least a plurality of the pedestals. Selected edge regions of the die are arranged to overlie recessed regions of the die attach pad between adjacent pedestals. The die is electrically connected to at least some of the contact leads. An adhesive is arranged to secure the die to the die attach pad, with the thickness of the adhesive between the web of the die attach pad and the die being greater than the thickness of the adhesive between the die and the top surfaces of the pedestals that support the die. The die attach pad may have rounded peripheral corners between adjacent edge surfaces of the die attach pad. In another aspect of the invention, a method of packaging integrated circuits is described, wherein the resulting packages include at least some of the aforementioned leadframe structures.
A semiconductor package comprising:
A semiconductor package as recited in 1, wherein the pedestals have rounded corners.
A semiconductor package as recited in 1, wherein the plurality of pedestals are not all of the same size.
A semiconductor package as recited in 1, wherein the pedestals are substantially circular and the diameter of the pedestals is in the range of approximately 0.1 and 0.2 millimeters.
A leadframe panel comprising a multiplicity of device areas, each device area being configured suitably to support an associated die and including:
A method of packaging integrated circuits, comprising:
Dependencies are inferred from the claim text.