US 2009/0152638 A1Published application

Dual oxide stress liner

AssigneeInternational Business Machines Corporation

InventorsMICHAEL P. BELYANSKY, Xiangdong Chen, Thomas W. Dyer, Geng Wang, Haining S. Yang

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Abstract

A transistor structure includes a first type of transistor (e.g., P-type) positioned in a first area of the substrate, and a second type of transistor (e.g., N-type) positioned in a second area of the substrate. A first type of stressing layer (compressive conformal nitride) is positioned above the first type of transistor and a second type of stressing layer (compressive tensile nitride) is positioned above the second type of transistor. In addition, another first type of stressing layer (compressive oxide) is positioned above the first type of transistor. Further, another second type of stressing layer (compressive oxide) is positioned above the second type of transistor.

Claims6

Dependent claims

A transistor structure comprising:

a substrate;
a first type of transistor positioned in a first area of said substrate;
a second type of transistor positioned in a second area of said substrate;
a first type of conformal nitride stressing layer positioned above said first type of transistor;
a second type of conformal nitride stressing layer positioned above said second type of transistor;
a first type of oxide stressing layer positioned above said first type of transistor, wherein a bottom side of said first type of oxide stressing layer that is adjacent said first type of transistor has a conformal shape matching a corresponding shape of said first type of conformal nitride stressing layer, and wherein a top side of said first type of oxide stressing layer that is opposite said bottom side of said first type of oxide stressing layer comprises a planar surface;
and
a second type of oxide stressing layer positioned above said second type of transistor, wherein a bottom side of said second type of oxide stressing layer that is adjacent said second type of transistor has a conformal shape matching a corresponding shape of said second type of conformal nitride stressing layer, and wherein a top side of said second type of oxide stressing layer that is opposite said bottom side of said second type of oxide stressing layer comprises a planar surface.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 11/956,043Filed 13 Dec 2007
Published: 18 Jun 2009
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H10D 84/038
Using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology: using silicon technology, e.g. SiGe
H10D 30/792
Arrangements for exerting mechanical stress on the crystal lattice of the channel regions: comprising applied insulating layers, e.g. stress liners
H10D 84/0167
The components including complementary IGFETs, e.g. CMOS devices: manufacturing their channels
H10D 84/85
Of only insulated-gate FETs [IGFET]: complementary IGFETs, e.g. CMOS