High-k/metal gate stack using capping layer methods, ic and related transistors

An integrated circuit comprising:

• a first type transistor having a gate electrode including a first metal, a second metal and a first dielectric layer, the first dielectric layer including oxygen;
• a second type transistor separated from the first type transistor by an isolation region, the second type transistor having a gate electrode including the second metal having a work function appropriate for the second type transistor and the first dielectric layer;
• and
• wherein the gate electrode of the first type transistor includes a rare earth metal between the first metal and the second metal and the gate electrode of the second type transistor includes a second dielectric layer made of an oxide of the rare earth metal.

A transistor comprising:

• a gate stack including:
• a high dielectric constant (high-k) dielectric layer over a substrate,
• a capping layer including an oxide of a rare earth metal over the high-k dielectric layer,
• a metal over the oxide of the rare earth metal, the metal having a work function commensurate with a well in the substrate, and
• a polysilicon over the metal.

A transistor comprising:

• a gate stack including:
• a high dielectric constant (high-k) dielectric layer over a substrate, the high-k dielectric layer including oxygen,
• a first metal having a work function commensurate with a well in the substrate,
• a capping layer including a rare earth metal over the first metal,
• a second metal over the capping layer, the second metal having a work function incompatible with the well in the substrate, and
• a polysilicon over the second metal.