Semiconductor device
AssigneesSanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
InventorsShuichi KIKUCHI, Kiyofumi Nakaya, Shuji Tanaka
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AssigneesSanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
InventorsShuichi KIKUCHI, Kiyofumi Nakaya, Shuji Tanaka
Estimating the term…
This invention is directed to offer a MOS transistor that has a high source-drain breakdown BVds, a low on resistance and a high electric current driving capacity. On resistance is lowered by forming an N well layer for lowering on resistance in the drift region. The N well layer is disposed beneath the gate electrode and away from the N well layer with a certain space between them. This space ensures the withstand voltage at the edge of the gate electrode of the drain layer side. Also, the N well layer is formed on the surface of an epitaxial layer in the region that includes a P+L layer. The edge of the N well layer of the drain layer side is located near the edge of the P+L layer of the drain layer side and away from the N well layer. This space makes the expansion of depletion layer from the P+L layer easier, further improving the withstand voltage.
A semiconductor device comprising:
Dependencies are inferred from the claim text.