NAND flash memory device having a contact for controlling a well potential
AssigneeSamsung Electronics Co., Ltd.
InventorsByung-jun Hwang, Jae-kwan Park, Jee-hoon Han, So-wi Jin, Nam-su Lim
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AssigneeSamsung Electronics Co., Ltd.
InventorsByung-jun Hwang, Jae-kwan Park, Jee-hoon Han, So-wi Jin, Nam-su Lim
Estimating the term…
A NAND flash memory device includes a plurality of active regions extending in a first direction on a substrate, the active regions including a first well of a first conductivity, a plurality of word lines extending on the first well in a second direction perpendicular to the first direction, first and second dummy word lines extending in a second direction on the first well, the first and second dummy word lines being separated from each other to define an intermediate region therebetween, the first and second dummy word lines being adapted to receive a substantially constant bias voltage of about 0 V, and at least one contact in an active region in the intermediate region between the first and second dummy word lines.
A NAND flash memory device, comprising:
The NAND flash memory device as claimed in claim of 14, wherein the plurality of word lines crosses the first active regions to define a plurality of cell strings extending in the first direction, a common source line being positioned to extend in the second direction between the plurality of cell strings and the first and second dummy word lines.
The NAND flash memory device as claimed in claim of 14, further comprising an isolation region between the third active region and each of the first and second dummy word line.
Dependencies are inferred from the claim text.