Micro hemispheric resonator gyro

A micro hemispheric resonator gyro, comprising:

• at least first, second and third silicon layers;
• the first layer having a top cover;
• the second silicon layer having a plurality of pickoff and forcer electrodes, a hemispheric resonator and a guard ring having first and second opposed sides, the guard ring containing the plurality of pickoff and forcer electrodes, and the hemispheric resonator;
• the third layer having a bottom cover;
• the top cover operatively coupled to the first side of the guard ring;
• the bottom cover operatively coupled to the second side of the guard ring;
• the plurality of pickoff and forcer electrodes, the guard ring, the top cover and the bottom cover being formed from single crystal silicon.

A method, comprising:

• applying and patterning resist on a first side of a center silicon wafer followed by isotropic etching to form hemispherical cavities;
• patterning and etching a second side of the center silicon wafer using deep reactive ion etching (DRIE) to form cylindrical holes that intersect the hemispherical cavities;
• growing over the entire center silicon wafer a conformal l:m thick layer of sacrificial silicon dioxide;
• removing the silicon dioxide from both the first and second sides of the center silicon wafer using chemical mechanical polishing (GMP);
• coating the entire center wafer with low stress PECVD silicon nitride;
• depositing a thin layer of titanium and gold over the entire silicon wafer;
• patterning with a mask the titanium and gold coated silicon nitride on the second side of the center silicon wafer to thereby define the eight pickoff and forcer electrodes and the silicon nitride;
• removing the silicon nitride, titanium and gold film from the first side of the center silicon wafer by chemical mechanical polishing (CMP);
• bonding a top cover wafer with patterned getters to the first side of the center silicon wafer using gold eutectic bonding;
• etching the electrode pattern established on the second side of the center silicon wafer using DRIE;
• bonding a bottom cover wafer with silicon dioxide to the second side of the center silicon wafer using low temperature direct wafer fusion bonding;
• etching vias in the bottom cover, through the silicon dioxide and silicon nitride layers to expose contact areas on the eight pickoff and forcer electrodes and guard ring;
• etching another via through the bottom cover and silicon dioxide layer to expose a contact area on the titanium and gold film on the surface of the silicon nitride layer;
• and
• depositing aluminum, using a shadow mask, on contact areas for ohmic contacts.