Reconfigurable device
AssigneeIpflex Inc.
InventorHiroki Honda
Life of this patent
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Abstract
There is provided a reconfigurable device that includes a plurality of processing blocks (13), wherein operation logic of each processing block is changeable, and a routing matrix (15) for configuring paths that connect the plurality of the processing blocks. Each processing block (13) includes a logic operation unit (21) whose logic is determined by configuration data (17) and a storage unit (40) for storing processing results of the logic operation unit. Each storage unit (40) includes a plurality of storage elements (31r), input means (32) for selecting one of the plurality of storage elements (31r) based on the configuration data (17) to store the output of the logic operation unit (21), and output means (33) for connecting the plurality of storage elements (31r) to the routing matrix (15).
Claims18
A reconfigurable device comprising:
- a plurality of processing blocks, wherein operation logic of each processing block is changeable;
- and
- a routing matrix for configuring paths that connect the plurality of processing blocks,
- wherein each processing block included in the plurality of processing blocks comprises:
- a logic operation unit whose logic is determined by configuration data;
- and
- a storage unit for storing operation results of the logic operation unit, and
- the storage unit comprises:
- a plurality of storage elements;
- input means for selecting, based on the configuration data, one of the plurality of storage elements and storing an output of the logic operation unit;
- and
- output means for connecting the plurality of storage elements to the routing matrix.
A control system for a reconfigurable device,
- wherein the device comprises:
- a plurality of processing blocks, wherein operation logic of each processing block is changeable;
- and
- a routing matrix for configuring paths that connect the plurality of processing blocks,
- wherein each processing block comprises included in the plurality of processing blocks:
- a logic operation unit whose logic is determined by configuration data;
- and
- a storage unit for storing operation results of the logic operation unit,
- the storage unit comprises:
- a plurality of storage elements;
- input means for selecting, based on the configuration data, one of the plurality of storage elements and storing an output of the logic operation unit;
- and output means for connecting the plurality of storage elements to the routing matrix, and
- the control system includes, when mapping cycle-based circuits onto the plurality of processing blocks, assigning, according to the configuration data, different registers for inputting and/or outputting that are included in the cycle-based circuits to different storage elements that are included in the plurality of storage elements.
A control method for a reconfigurable device,
- wherein the device comprises:
- a plurality of processing blocks, wherein operation logic of each processing block is changeable;
- and
- a routing matrix for configuring paths that connect the plurality of processing blocks,
- wherein each processing block comprises:
- a logic operation unit whose logic is determined by configuration data;
- and
- a storage unit for storing operation results of the logic operation unit,
- the storage unit comprises:
- a plurality of storage elements;
- input means for selecting, based on the configuration data, one of the plurality of storage elements and storing an output of the logic operation unit;
- and output means for connecting the plurality of storage elements to the routing matrix, and
- the control method includes, when mapping cycle-based circuits onto the plurality of processing blocks, assigning, according to the configuration data, different registers for inputting and/or outputting that are included in the cycle-based circuits to different storage elements that are included in the plurality of storage elements.
A system for generating configuration data for a reconfigurable device,
- wherein the device comprises:
- a plurality of processing blocks, wherein operation logic of each processing block is changeable;
- and
- a routing matrix for configuring paths that connect the plurality of processing blocks,
- wherein each processing block comprises:
- a logic operation unit whose logic is determined by the configuration data;
- and
- a storage unit for storing operation results of the logic operation unit,
- the storage unit comprises:
- a plurality of storage elements;
- input means for selecting, based on the configuration data, one of the plurality of storage elements and storing an output of the logic operation unit;
- and output means for connecting the plurality of storage elements to the routing matrix, and
- the system comprises:
- means for generating cycle-based RTL descriptions for a user circuit;
- means for carrying out logic synthesis of the cycle-based RTL descriptions in each cycle;
- and
- means for generating the configuration data that assign different registers for inputting and/or outputting that are included in cycle-based circuits provided by the logic synthesis to different storage elements that are included in the plurality of storage elements when mapping the cycle-based circuits onto the plurality of processing blocks.
A method for generating configuration data for a reconfigurable device,
- wherein the device comprises:
- a plurality of processing blocks, wherein operation logic of each processing block is changeable;
- and
- a routing matrix for configuring paths that connect the plurality of processing blocks,
- wherein each processing block comprises:
- a logic operation unit whose logic is determined by the configuration data;
- and
- a storage unit for storing operation results of the logic operation unit,
- the storage unit comprises:
- a plurality of storage elements;
- input means for selecting, based on the configuration data, one of the plurality of storage elements and storing an output of the logic operation unit;
- and output means for connecting the plurality of storage elements to the routing matrix, and
- the method comprises:
- generating cycle-based RTL descriptions for a user circuit;
- carrying out logic synthesis of the cycle-based RTL descriptions in each cycle;
- and
- generating the configuration data that assign different registers for inputting and/or outputting that are included in cycle-based circuits provided by the logic synthesis to different storage elements that are included in the plurality of storage elements according to the configuration data when mapping the cycle-based circuits onto the plurality of processing blocks.
Dependencies are inferred from the claim text.