System and Method for Providing Data Integrity in a Non-Volatile Memory System
AssigneeCadence Design Systems, Inc.
InventorRobert Alan Reid
Life of this patent
Estimating the term…
Abstract
An invention is provided for ensuring data integrity in a non-volatile memory system, including boot block data integrity during Power On Reset. The invention includes loading data into a buffer, such as a flash buffer, and generating an error detection code for the data utilizing a check code generator located in the memory controller. The error detection code is compared to a previously stored error detection code associated with the data. Then, when the error detection code is different from the previously stored error detection code, a correction pattern is calculated and applied to the data directly in the buffer for the non-volatile memory.
Claims25
A method for providing data integrity in a non-volatile memory system, comprising the operations of:
- loading data into a buffer;
- generating an error detection code for the data utilizing a check code generator located in a memory controller;
- comparing the error detection code to a previously stored error detection code associated with the data;
- and
- calculating a correction pattern and applying the correction pattern to the data in the buffer when the error detection code is different from the previously stored error detection code.
A non-volatile memory controller capable of checking data integrity, comprising:
- a check code generator, wherein the check code generator generates error detection codes for data stored in a buffer, the error detection codes being utilized to detect errors in the data;
- and
- error correction logic that calculates a correction pattern and offset for detected errors within the data, wherein the flash controller applies the correction pattern at the calculated offset to data stored in the flash buffer when the data includes errors.
A non-volatile memory device capable of checking data integrity, comprising:
- a non-volatile memory including a memory array coupled to a buffer;
- and
- a non-volatile memory controller coupled to the non-volatile memory, the non-volatile memory controller including a check code generator that generates error detection codes for data stored in the buffer, the non-volatile memory further including error correction logic that calculates a correction pattern and offset for detected errors within the data,
- wherein the non-volatile memory controller applies the correction pattern at the calculated offset to data in the buffer when data errors are detected.
A method for providing data integrity in a non-volatile memory system, comprising the operations of:
- loading data into a buffer associated with non-volatile memory;
- generating an error correction pattern for the data utilizing an error correction logic located in a non-volatile memory controller;
- and
- applying the correction pattern to the data in the buffer.
A method for providing data integrity in a non-volatile memory system, comprising the operations of:
- loading data into a buffer associated with non-volatile memory, wherein the data is encoded in an error-tolerant coding;
- and
- extracting data from the error-tolerant coding utilizing an extractor located in a flash controller.
Dependencies are inferred from the claim text.