System and Method for Increasing Error Checking Performance by Calculating CRC Calculations After Multiple Test Patterns for Processor Design Verification and Validation

An information handling system comprising:

• one or more processors;
• a memory accessible by the processors;
• one or more nonvolatile storage devices accessible by the processors;
• and
• a set of instructions stored in the memory, wherein one or more of the processors executes the set of instructions in order to perform actions of:
• executing one of a plurality of test patterns;
• after the executing of one of the plurality of test patterns, determining whether each of the plurality of test patterns has executed once;
• based upon determining that each of the plurality of test patterns has not executed once, executing a different one of the plurality of test patterns;
• based upon determining that each of the plurality of test patterns has executed once, computing a hardware memory error detection check value;
• comparing the hardware memory error detection check value with a simulation memory error detection check value;
• and
• setting an error flag in response to the hardware memory error detection check value not matching the simulation memory error detection check value.

A computer program product stored on a computer operable media, the computer operable media containing instructions for execution by a computer, which, when executed by the computer, cause the computer to implement a method of processing test patterns, the method comprising:

• executing one of a plurality of test patterns;
• after the executing of one of the plurality of test patterns, determining whether each of the plurality of test patterns has executed once;
• based upon determining that each of the plurality of test patterns has not executed once, executing a different one of the plurality of test patterns;
• based upon determining that each of the plurality of test patterns has executed once, computing a hardware memory error detection check value;
• comparing the hardware memory error detection check value with a simulation memory error detection check value;
• and
• setting an error flag in response to the hardware memory error detection check value not matching the simulation memory error detection check value.