Systems, methods and devices for limiting current consumption upon power-up
AssigneeMicron Technology, Inc.
InventorJune Lee
Life of this patent
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Abstract
Embodiments are described including those for controlling peak current consumption of a multi-chip memory package during power-up. In one embodiment, each memory device of the multi-chip package includes a power level detector used to compare an internal voltage signal to a threshold. A current limiter controls the ramping rate of the internal voltage signal in response to the power level detector as the internal voltage signal ramps up towards the threshold.
Claims29
A circuit for powering-up a memory device, comprising:
- a power level detector block configured to receive a power supply signal, the power level detector block operable to compare an attribute of the signal to a threshold attribute;
- and
- a voltage regulator block coupled to the power level detector block, the voltage regulator block operable to control a ramping rate at which the attribute of the signal changes responsive to the power level detector block.
A plurality of memory devices in a multi-device package, comprising:
- at least a first memory device having a first current limiter circuit coupled to receive an external supply voltage, wherein the first current limiter circuit is operable to generate an internal supply voltage relative to the external supply voltage at a ramp up rate that is less than a ramp up rate of the external supply voltage;
- and
- at least a second memory device having a second current limiter circuit coupled to receive the external supply voltage, wherein the second current limiter circuit is operable to generate an internal supply voltage relative to the external supply voltage at a ramp up rate that is different relative than the ramp up rate of the at least first memory device.
A system comprising:
- processor circuitry;
- and
- at least one memory package coupled to the processor circuit, the at least one memory package including a plurality of memory devices, wherein each memory device comprises:
- a strap pad coupled to receive a select signal from the processor circuitry;
- a current limiter circuit in communication with the signal and configured to generate a supply signal at a ramp up rate determined by the received select signal;
- and
- a power level detector circuit configured to receive the supply signal and compare the supply signal to a reference signal, the power level detector circuit operable to enable the current limiter circuit responsive to the supply signal being less than a reference signal comparison.
A method of powering-up a memory device, comprising:
- ramping up an internal voltage signal;
- comparing the internal voltage signal to a threshold;
- and
- decreasing a ramping rate of the internal voltage signal ramping up based on the comparison.
A method of powering up a multi-device package, comprising:
- receiving a first select signal;
- generating a first internal voltage signal at a first ramp up rate responsive to the first select signal;
- receiving a second select signal;
- and
- generating a second internal voltage signal at a second ramp up rate that is different from the first ramp up rate responsive to the second select signal.
Dependencies are inferred from the claim text.