US 2009/0024823 A1 · OVERLAYED SEPARATE DMA MAPPING OF ADAPTERS

Abstract

DMA mapping for adapters configured to communicate with respect to a computer processor memory structure via DMA and configured to have DMA mapping space for control information and data. The adapters are separated into groups. The control information DMA mapping of the adapters is separated into at least three types: type “H” mapping, type “D” mapping, and shared mapping. The type “H” mapping and the shared mapping are applied to one group of adapters for the DMA mapping space for control information, such as host adapters, and the type “D” mapping and the shared mapping are applied to another group, such as device adapters, and the type “H” mapping of the one group and the type “D” mapping of the another group are overlayed in the DMA mapping space for control information for the respective adapters.

Claims8

Dependent claims

A method for providing DMA mapping configured for a plurality of adapters, said adapters configured to communicate with respect to a computer processor memory structure via DMA and configured to have DMA mapping space for control information and data, comprising the steps of:

separating said plurality of adapters into at least two groups;
separating control information DMA mapping of said adapters into at least three types:
type “H” mapping, type “D” mapping, and shared mapping;
and
applying said type “H” mapping and said shared mapping to one of said groups of adapters for said DMA mapping space for control information, and applying said type “D” mapping and said shared mapping to another of said groups of adapters for said DMA mapping space for control information, and overlaying said type “H” mapping of said one group of adapters and said type “D” mapping of said another group of adapters in said DMA mapping space for control information of said respective adapters.

2 more elements

A method for mapping DMA mapping space of a plurality of adapters of a communication system, said adapters configured to communicate with respect to a computer processor memory structure of said communication system via DMA, said DMA mapping space for control information and data, comprising the steps of:

initiating an IML of said communication system;
separating said plurality of adapters into at least two groups;
separating control information DMA mapping of said computer processor memory structure for said adapters into at least three types:
type “H” mapping, type “D” mapping, and shared mapping;
allocating DMA memory space of said DMA mapping space to each of said plurality of adapters;
and
applying said type “H” mapping and said shared mapping to one of said groups of adapters for said DMA mapping space for control information, and applying said type “D” mapping and said shared mapping to another of said groups of adapters for said DMA mapping space for control information, and overlaying said type “H” mapping of said one of said groups of adapters and said type “D” mapping of said another of said groups of adapters in said DMA mapping space for control information of said respective adapters.

4 more elements

Dependencies are inferred from the claim text.

Overlayed separate dma mapping of adapters

Life of this patent

Overlayed separate dma mapping of adapters

Life of this patent

Abstract

Claims8