US 2009/0023098 A1 · METHOD FOR FABRICATING DUAL DAMASCENE PROFILES USING SUB PIXEL-VOTING LITHOGRAPHY AND DEVICES MADE BY SAME

Abstract

This invention provides processing steps, methods and materials strategies for making patterns of structures for integrated electronic devices and systems. Processing methods of the present invention are capable of making micro-and nano-scale structures, such as Dual Damascene profiles, recessed features and interconnect structures, having non-uniform cross-sectional geometries useful for establishing electrical contact between device components of an electronic device. The present invention provides device fabrication methods and processing strategies using sub pixel-voting lithographic patterning of a single layer of photoresist useful for fabricating and integrating multilevel interconnect structures for high performance electronic or opto-electronic devices, particularly useful for Very Large Scale Integrated (VLSI) and Ultra large Scale Integrated (ULSI) devices. Processing methods of the present invention are complementary to conventional microfabrication and nanofabrication methods for making integrated electronics, and can be effectively integrated into existing photolithographic, etching, and thin film deposition patterning systems, processes and infrastructure.

Claims54

Dependent claims

A method for processing a substrate, said method comprising the steps of:

providing a layer of radiation sensitive material on at least a portion of said substrate;
exposing a first area of said layer of radiation sensitive material to radiation having a first intensity;
exposing a second area of said layer of radiation sensitive material to radiation having a second intensity;
wherein said second area of said layer at least partially overlaps said first area in an overlapping area;
developing said layer of radiation sensitive material by removing material from regions of the layer corresponding to the first and second areas, thereby generating a recessed feature having a first non-uniform depth profile in said layer of radiation sensitive material;
and
transferring at least a portion of said recessed feature having said first non-uniform depth profile in said layer of radiation sensitive material into said substrate;
said transferring step generating a recessed feature having a second non-uniform depth profile in said substrate, thereby processing said substrate.

5 more elements

A method for processing a substrate, said method comprising the steps of:

providing a layer of radiation sensitive material on at least a portion of said substrate;
exposing a first area of said layer of radiation sensitive material to radiation having a first intensity;
exposing a second area of said layer of radiation sensitive material to radiation having a second intensity;
wherein said second area of said layer at least partially overlaps said first area in an overlapping area;
developing said layer of radiation sensitive material by removing material from regions of the layer corresponding to the first and second areas, thereby generating a recessed feature having a first non-uniform depth profile in said layer of radiation sensitive material;
transferring at least a portion of said recessed feature having said first non-uniform depth profile in said layer of radiation sensitive material into said substrate;
said transferring step generating a recessed feature having a second non-uniform depth profile in said substrate, thereby processing said substrate;
and
depositing material onto said recessed feature having said second non-uniform depth profile, thereby generating a structure at least partially embedded in said substrate.

6 more elements

Dependencies are inferred from the claim text.

Method for fabricating dual damascene profiles using sub pixel-voting lithography and devices made by same

Life of this patent

Method for fabricating dual damascene profiles using sub pixel-voting lithography and devices made by same

Life of this patent

Abstract

Claims54