Early Write Method and Apparatus
OwnerJong-Hoon Ohinventor
Life of this patent
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Abstract
A write operation is performed in a memory device. During a first stage of the write operation, a signal is applied to gating circuitry at a first voltage level for coupling a data bus line to a bit line when the data bus line is unmasked and for decoupling the data bus line from the bit line when the data bus line is masked. During one or more subsequent stages of the write operation, the signal voltage level is changed for enabling completion of the write operation.
Claims21
A method of performing a write operation in a memory device, comprising:
- during a first stage of the write operation, applying a signal to gating circuitry at a first voltage level for coupling a data bus line to a bit line when the data bus line is unmasked and for decoupling the data bus line from the bit line when the data bus line is masked;
- and
- during one or more subsequent stages of the write operation, changing the signal voltage level for enabling completion of the write operation.
A memory device, comprising:
- signal generation circuitry configured to output a signal at a first voltage level during a first stage of a write operation and to change the signal voltage level during a subsequent stage of the write operation;
- and
- gating circuitry configured to:
- couple a data bus line to a bit line when the data bus line is unmasked, responsive to the signal output by the signal generation circuitry during the first stage of the write operation;
- decouple the data bus line from the bit line when the data bus line is masked, responsive to the signal output by the signal generation circuitry during the first stage of the write operation;
- and
- enable completion of the write operation responsive to the signal output by the signal generation circuitry during the subsequent stage of the write operation.
A memory device, comprising:
- means for outputting a signal at a first voltage level during a first stage of a write operation and for changing the signal voltage level during a subsequent stage of the write operation;
- and
- gating circuitry configured to:
- couple a data bus line to a bit line when the data bus line is unmasked responsive to the signal output by the signal generation circuitry during the first stage of the write operation;
- decouple the data bus line from the bit line when the data bus line is masked responsive to the signal output by the signal generation circuitry during the first stage of the write operation;
- and
- enable completion of the write operation responsive to the signal output by the signal generation circuitry during the subsequent stage of the write operation.
A method of writing information to a memory device, comprising:
- coupling a data bus line to a bit line during a first stage of a memory access cycle when the memory access cycle occurs during an unmasked write operation;
- decoupling the data bus line from the bit line during the first stage of the memory access cycle when the memory access cycle occurs during a masked write operation;
- and
- completing either one of the write operations during a subsequent stage of the memory access cycle, wherein the memory access cycle is shorter for the unmasked write operation than for the masked write operation.
A memory device comprising gating circuitry configured to:
- couple a data bus line to a bit line during a first stage of a memory access cycle when the memory access cycle occurs during an unmasked write operation;
- decouple the data bus line from the bit line during the first stage of the memory access cycle when the memory access cycle occurs during a masked write operation;
- and
- enable completion of either one of the write operations during a subsequent stage of the memory access cycle, wherein the memory access cycle is shorter for the unmasked write operation than for the masked write operation.
Dependencies are inferred from the claim text.