Internal voltage generator and control method thereof, and semiconductor memory device and system including the same
AssigneeSamsung Electronics Co., Ltd.
InventorDae-Seok Byeon
Life of this patent
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Abstract
An internal voltage of a semiconductor memory device is controlled, where the internal voltage is set according to a reference voltage. The reference voltage is controlled according to first control data to increase the internal voltage to be higher than a target voltage in a power-up operation, and second control data is read. The reference voltage is then controlled according to the second control data to decrease the internal voltage to the target voltage.
Claims16
A method for controlling an internal voltage of a semiconductor memory device, wherein the internal voltage is set according to a reference voltage, said method comprising:
- controlling the reference voltage according to first control data to increase the internal voltage to be higher than a target voltage in a power-up operation;
- reading second control data;
- and
- controlling the reference voltage according to the second control data to decrease the internal voltage to the target voltage.
A semiconductor memory device comprising:
- a memory cell array configured to store electrical fuse data;
- a control signal generator circuit configured to generate first control data in a power-up operation;
- an internal voltage generator circuit configured to generate an internal voltage;
- a detector circuit configured to detect whether the internal voltage reaches a target voltage;
- and
- a control circuit for controlling a page buffer circuit according to a detection results of the detector circuit in order to read the electrical fuse data, and generating second control data according to the electrical fuse data,
- wherein the internal voltage generator circuit sets the internal voltage to be higher than the target voltage according to the first control data, and sets the internal voltage to the target voltage according to the second control data.
A memory system comprising a semiconductor memory device, and a memory controller configured to control the semiconductor memory device,
- wherein the semiconductor memory device is configured to control a reference voltage according to first control data to increase an internal voltage to be higher than a target voltage in a power-up operation, to read second control data, and control the reference voltage according to the second control data to decrease the internal voltage to the target voltage.
A memory system comprising a semiconductor memory device, and a memory controller configured to control the semiconductor memory device, wherein the semiconductor memory device comprises:
- a memory cell array configured to store electrical fuse data;
- a control signal generator circuit configured to generate first control data in a power-up operation;
- an internal voltage generator circuit configured to generate an internal voltage;
- a detector circuit configured to detect whether the internal voltage reaches a target voltage;
- and
- a control circuit for controlling a page buffer circuit according to a detection results of the detector circuit in order to read the electrical fuse data, and generating second control data according to the electrical fuse data,
- wherein the internal voltage generator circuit sets the internal voltage to be higher than the target voltage according to the first control data, and sets the internal voltage to the target voltage according to the second control data.
Dependencies are inferred from the claim text.