Digital television chip, system and method thereof

A digital television system, comprising:

• a display for displaying images;
• and
• a digital television chip for converting analog signals into digital signals, wherein the digital television chip receives a couple of S-video signals SY and SC, a couple of Tuner CVBS signals VIF and SIF and a CVBS Line-in Video signal, comprising:
• a multiplexer receiving the S-video signals SY and SC, the Tuner CVBS signals VIF and SIF and the CVBS Line-in Video signal;
• a first converting unit converting one of the S-video signals SY and SC, one of the Tuner CVBS signals VIF and SIF, or the CVBS Line-in Video signal into a first digital signal for signal processing;
• and
• a second converting unit converting one of the S-video signals SY and SC, one of the Tuner CVBS signals VIF and SIF, or the CVBS Line-in Video signal into a second digital signal for signal processing;
• wherein the multiplexer, according to a control signal, outputs one of the S-video signals SY and SC to the first converting unit, outputs the other of the S-video signals SY and SC to the second converting unit, outputs one of the Tuner CVBS signals VIF and SIF to the first converting unit, outputs the other of the Tuner CVBS signals VIF and SIF to the second converting unit, or outputs the CVBS Line-in Video signal to one of the first and second converting units.

A layout size reduction method by sharing converting units for a digital television chip, comprising:

• using a multiplexer to receive a couple of S-video signals SY and SC, a couple of Tuner CVBS signals VIF and SIF and a CVBS Line-in Video signal;
• outputting one of the S-video signals SY and SC, one of the Tuner CVBS signals VIF and SIF, or the CVBS Line-in Video signal to a first converting unit according to a control signal;
• and
• outputting the other of the S-video signals SY and SC, the other of the Tuner CVBS signals VIF and SIF, or the CVBS Line-in Video signal to a second converting unit according to the control signal.