Systems, methods and devices for a CMOS imager having a pixel output clamp
AssigneeMicron Technology, Inc.
InventorsTaehee Cho, Hai Yan, Christopher Zeleznik, Chiajen Lee
Life of this patent
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Abstract
Embodiments of a pixel read out circuit in an imager device is described. The pixel read out circuit includes an output node that is connected to a plurality of pixel cells. An output signal from a selected one of the plurality of pixel cells is applied to the output node. The pixel read out circuit also includes a clamp-out circuit that limits the magnitude of the output signal to a voltage determined by the voltage of a reference signal to prevent the output signal from reaching a level that might exceed the dynamic range of analog circuitry receiving the output signal.
Claims28
A pixel read out circuit, comprising:
- an output node coupled to a plurality of pixel cells, the output node configured to output a first signal from a selected one of the plurality of pixel cells;
- and
- a clamp-out circuit coupled to the output node and to a reference node, the clamp-out circuit operable to limit the magnitude of the first signal to a predetermined level.
A pixel readout circuit comprising:
- a first output node coupled to a plurality of pixel cells, the first output node configured to output a first signal from a selected one of the plurality of pixel cells;
- and
- a clamp circuit having a second output node coupled to the first output node, the clamp circuit having a transistor configured to receive a reference voltage at a gate of the transistorto render the transistor conductive responsive to the first signal level being less than a magnitude determined by the magnitude of the reference voltage.
An imager circuit comprising:
- an array of pixel cells arranged in rows and columns, each of the pixel cells coupled to a column line and operable to output a first and second pixel output signal on the respective column line;
- a clamping circuit coupled to the array of pixel cells to receive the pixel output signals on the respective column line, the clamping circuit operable to receive a reference signal and to limit the voltage level of each of the pixel output signal to a voltage level determined by the magnitude of the reference signal;
- a sampling circuit coupled to the clamping circuit, and configured to receive the pixel output signals from the clamping circuit, the sampling circuit operable to sample and collect each of the pixel output signals;
- an amplifier circuit coupled to receive the pixel output signals from the sampling circuit, the amplifier circuit operable to generate a final output signal by taking the difference of the first pixel output signal and the second pixel output signal;
- and
- an analog-to-digital converter operable to receive the final output signal from the sampling circuit and operable to convert the final output signal into a digital image signal.
A computer system comprising:
- a data input device;
- a data output device;
- a data storage device;
- a plurality of buses to and from the data input, output and storage devices;
- computing circuitry coupled to the data input, output and storage devices, the computing circuitry operable to process data to and from the data input and output devices on the plurality of buses;
- and
- an imager device coupled to the computing circuitry, the imager device comprising a pixel read out circuit further comprising:
- an output node coupled to a plurality of pixel cells, the output node configured to output a first signal from a selected one of the plurality of pixel cells;
- and
- a clamp-out circuit coupled to the output node and to a reference node configured to receive a reference signal, the clamp-out circuit operable to limit the magnitude of the first signal to a level determined by the magnitude of the reference signal.
A method for reading a pixel output signal in a imager circuit comprising:
- receiving a first signal from a pixel cell;
- limiting the first signal to magnitude determined by a magnitude of a reference signal;
- and
- outputting the limited first signal.
A method of generating a digital image in an imager device comprising:
- outputting at least one pixel signal on a column line of a plurality of column lines coupling an array of pixel cells arranged in rows and columns;
- clamping the magnitude of the at least one pixel signal to a voltage determined by the voltage of a reference signal;
- sampling the at least one pixel signal and sampling at least another pixel signal;
- generating a final pixel output signal by taking the signal difference of the at least one pixel signal from the at least another pixel signal;
- and
- converting the final pixel output signal to a digital image signal.
Dependencies are inferred from the claim text.