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AssigneeSolarflare Communications, Inc.
InventorsGeorge A. Zimmerman, William W. Jones
Estimating the term…
A method and apparatus for compensating for gain offset, bias offset, and skew in a parallel processing environment is disclosed. The method and apparatus may be configured to compensate for mismatches between the sub-channel signals in a parallel ADC. This allows for accurate combination of the signals on the sub-channels. The method and apparatus may be utilized in a high speed data communication system having two or more channels, each of which are interleaved into two or more sub-channels. In one embodiment a DC loop processes signals on two or more sub-channels to account for and remove unwanted bias offset. In one embodiment a sub-channel gain mismatch compensation system (SCGMC) processes signals on two or more sub-channels to account for and remove unwanted gain offset. In one embodiment a skew compensation system, such as a parallel interpolator, processes signals on two or more sub-channels to remove unwanted skew across sub-channels.
A system for processing an analog signal to convert the analog signal to a digital signal comprising:
An parallel analog to digital converter system configured to perform analog signal to digital signal conversion of an analog signal comprising:
A method for removing inconsistencies in two or more digital signals from an analog to digital converter structure to enable accurate re-assembly of the two or more digital signals, the method comprising:
A method for converting a high frequency analog signal to a digital signal comprising:
A analog to digital converter system configured to perform analog signal to digital signal conversion of an analog signal comprising:
Dependencies are inferred from the claim text.