Semiconductor testing circuit and semiconductor testing method

A semiconductor testing circuit used for testing AC characteristics of a semiconductor device, comprising:

• a second signal line connected to a reference terminal of the semiconductor device, the reference terminal supplying, to outside of the semiconductor device, a clock signal having passed through an internal clock tree of the semiconductor device;
• flip-flop circuits with selectors each of which include a flip-flop having at least an output pin, a clock pin, and a first input pin, and a selector having second and third input pins and electrically connecting the first input pin and one of the second and third input pins, the second input pins being respectively connected to terminals to be tested of the semiconductor device, the clock pins being connected to the second signal line;
• fourth switch circuits for controlling electrical connection/disconnection between the second input pins of the flip-flop circuits with the selectors and the terminals to be tested;
• third signal lines each of which connect the third input pin of the flip-flop circuits with the selectors to the output pin of the adjacent flip-flop circuit with the selector, and connect the output pin of the flip-flop circuit with the selector to a terminal not to be tested of the semiconductor device when the output pin is not connected to the third input pin;
• a fifth switch circuit for controlling electrical connection/disconnection between the second signal line and the reference terminal;
• and
• a second resistor connected to one end of the second signal line,
• wherein at least the second signal line, the flip-flop circuits with the selectors, the fourth switch circuits, the third signal lines, and the fifth switch circuit are formed on the semiconductor device.