Defect detection system with multilevel output capability and method thereof
AssigneeUnited Microelectronics Corp.
InventorsChien-Kuo Wang, Tai-Chi Kao, Tsuoe-Hsiang Liao, Yuan-Che Lee, Yu-Ming Sun
Life of this patent
Estimating the term…
Loading patent…
AssigneeUnited Microelectronics Corp.
InventorsChien-Kuo Wang, Tai-Chi Kao, Tsuoe-Hsiang Liao, Yuan-Che Lee, Yu-Ming Sun
Estimating the term…
A defect detection system and related method take advantage of multilevel detection technique for detecting defects on an integrated circuit. The defect detection system utilizes an analog-to-digital converter for converting an analog sensing signal into an output code having a plurality of bits. The defect detection methods include an open test method and a short test method. The open and short test methods both include a calibrating method and a testing method individually. The calibrating method functions to determine a preset reference voltage for the analog-to-digital converter based on a predetermined code. The testing method makes use of the preset reference voltage and the predetermined code for generating the output code having a plurality of bits. The output code is then utilized to determine whether or not there are open or short defects on the integrated circuit and to classify the defects.
A defect detection system for identifying defects in a test route of an integrated circuit comprising:
A method for performing a calibration mode operation of an open test for analyzing an open in a test route of an integrated circuit comprising:
A method for performing a test mode operation of an open test for analyzing an open in a test route of an integrated circuit comprising:
A method for performing a calibration mode operation of a short test for analyzing a short in a test route of an integrated circuit comprising:
A method for performing a test mode operation of a short test for analyzing a short in a test route of an integrated circuit comprising:
Dependencies are inferred from the claim text.