Semiconductor device and method for producing the same
AssigneeRenesas Technology Corp.
InventorMasaru KADOSHIMA
Life of this patent
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Abstract
A complementary semiconductor device comprising an n-channel transistor and a p-channel transistor, including: the n-channel transistor including a gate insulating film and a first metal gate electrode formed on the gate insulating film and having a first compound layer including a first metal (M1) and silicon (Si); and the p-channel transistor including a gate insulating film and a second metal gate electrode formed on the gate insulating film and having a second compound layer including the first metal (M1), a second metal (M2), and silicon (Si), wherein the composition of the first compound layer is represented by a composition formula: M1Six (1≦x), and the composition of the second compound layer is represented by a composition formula: M1M2Siy (0<y≦0.5).
Claims11
A complementary semiconductor device comprising an n-channel transistor and a p-channel transistor, comprising:
- the n-channel transistor including a gate insulating film and a first metal gate electrode formed on the gate insulating film and having a first compound layer including a first metal (M1) and silicon (Si);
- and
- the p-channel transistor including a gate insulating film and a second metal gate electrode formed on the gate insulating film and having a second compound layer including the first metal (M1), a second metal (M2), and silicon (Si), wherein
- the composition of the first compound layer is represented by a composition formula:
- M1Six (1≦x), and
- the composition of the second compound layer is represented by a composition formula:
- M1M2Siy (0<y≦0.5).
A method for producing a complementary semiconductor device having an n-channel transistor and a p-channel transistor, comprising the steps of:
- preparing a semiconductor substrate;
- defining an n-channel transistor formation region and a p-channel transistor formation region in the semiconductor substrate and forming a gate insulating film, a first compound layer including a first metal (M1) and silicon (Si), and a dummy gate metal layer in the respective regions;
- selectively removing the dummy gate metal layer in the p-channel transistor formation region;
- forming a second metal (M2) layer to cover the semiconductor substrate;
- and
- forming a metal gate electrode of a second compound layer including the first metal (M1), the second metal (M2), and silicon (Si) by reacting the first compound layer and the second metal (M2) layer in the p-channel transistor formation region by heat treatment.
Dependencies are inferred from the claim text.