Guard ring structures for high voltage cmos/low voltage cmos technology using ldmos (lateral double-diffused metal oxide semiconductor) device fabrication

A semiconductor structure fabrication method, comprising:

• providing a semiconductor structure which includes a semiconductor substrate,
• wherein the semiconductor substrate includes a top substrate surface which defines a reference direction perpendicular to the top substrate surface;
• simultaneously forming a first doped transistor region of a first transistor and a first doped guard-ring region of a guard ring on the semiconductor substrate,
• wherein the first doped transistor region and the first doped guard-ring region comprise dopants of a first doping polarity;
• and then
• simultaneously forming a second doped transistor region of the first transistor and a second doped guard-ring region of the guard ring on the semiconductor substrate,
• wherein the second doped transistor region and the second doped guard-ring region comprise dopants of the first doping polarity,
• wherein the second doped guard-ring region is in direct physical contact with the first doped guard-ring region, and
• wherein the guard ring forms a closed loop around the first and second doped transistor regions.