Semiconductor Device and Method of Making Same

An integrated circuit with logic and/or linear transistors and memory devices, the integrated circuit comprising:

• a region of logic devices comprising field effect transistors, each field effect transistors including a source spaced from a drain by a channel, a gate dielectric over the channel, and a gate electrode over the gate dielectric;
• a region of memory devices including electrically programmable memory transistors, each memory device comprising a source spaced from a drain by a channel, a floating gate dielectric over a channel region, a floating gate over the floating gate dielectric;
• and
• metallization over the logic and memory devices that interconnects the logic and memory devices, wherein the metallization forms at least portions of the control gates and the floating gates of the memory devices.

A method of fabricating a semiconductor wafer to form a memory area and a logic area, the memory area comprising nonvolatile memory devices employing floating gate transistors, the logic area comprising field effect transistors, the method comprising:

• separating the semiconductor wafer into memory and logic areas;
• forming a first gate dielectric region over the memory area;
• forming a second gate dielectric region over the logic area;
• depositing and patterning a conducting material, wherein the conducting material forms a gate electrode over the logic areas and a floating gate electrode over the memory areas;
• doping to form source, drain, channel regions;
• and
• forming a metallization region over the floating gate electrode, wherein the metallization region capacitively couples a control gate node to the floating gate electrode of the floating gate transistors.