Semiconductor device and method of manufacturing the same
AssigneeSpansion LLC
InventorHiroyuki Nansei
Life of this patent
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Abstract
One embodiment in accordance with the invention can include a semiconductor device that includes: a groove that is formed in a semiconductor substrate; bottom oxide films that are formed on both side faces of the groove; two charge storage layers that are formed on side faces of the bottom oxide films; top oxide films that are formed on side faces of the two charge storage layers; and a silicon oxide layer that is formed on the bottom face of the groove, and has a smaller film thickness than the top oxide films.
Claims20
A semiconductor device comprising:
- a groove that is formed in a semiconductor substrate;
- bottom oxide films that are formed on both side faces of the groove;
- two charge storage layers that are formed on side faces of the bottom oxide films;
- top oxide films that are formed on side faces of the two charge storage layers;
- and
- a silicon oxide layer that is formed on a bottom face of the groove, and has a smaller film thickness than the top oxide films.
A wireless communications device, comprising:
- a processor;
- a communications component coupled to the processor;
- a transmitter coupled to the processor;
- a receiver;
- an antenna coupled to the transmitter circuit and the receiver circuit;
- and
- a memory coupled to the processor, the memory comprising:
- a groove that is formed in a semiconductor substrate;
- bottom oxide films that are formed on both side faces of the groove;
- two charge storage layers that are formed on side faces of the bottom oxide films;
- top oxide films that are formed on side faces of the two charge storage layers;
- and
- a silicon oxide layer that is formed on a bottom face of the groove, and has a smaller film thickness than the top oxide films.
A computing device comprising:
- a processor;
- an input component coupled to the processor;
- an output component coupled to the processor;
- and
- a memory coupled to the processor, the memory comprising:
- a groove that is formed in a semiconductor substrate;
- bottom oxide films that are formed on both side faces of the groove;
- two charge storage layers that are formed on side faces of the bottom oxide films;
- top oxide films that are formed on side faces of the two charge storage layers;
- and
- a second groove that is formed in a portion of the semiconductor substrate, the portion being located between the two charge storage layers.
Dependencies are inferred from the claim text.