Transistor with differently doped strained current electrode region

A method comprising:

• providing a semiconductor layer;
• forming a transistor gate of a transistor overlying the semiconductor layer;
• removing portions of the semiconductor layer lateral to the transistor gate to form a first recess and a second recess;
• epitaxially growing a first structure within the first recess on the semiconductor layer, the first structure having a first in-situ current electrode doping profile;
• epitaxially growing a second structure within the second recess on the semiconductor layer, the second structure having the first in-situ current electrode doping profile;
• epitaxially growing a third structure on the first structure, the third structure having a second in-situ current electrode doping profile that has a higher first conductivity type current electrode doping concentration than the first in-situ current electrode doping profile;
• epitaxially growing a fourth structure on the second structure, the fourth structure having the second in-situ current electrode doping profile;
• forming a sidewall spacer adjacent the transistor gate;
• and
• completing formation of a source of the transistor and a drain of the transistor using at least a portion of the third structure as a portion of the source of the transistor and using at least a portion of the fourth structure as a portion of the drain of the transistor.

A transistor comprising:

• a semiconductor layer;
• a control electrode of the transistor overlying the semiconductor layer, a channel of the transistor underlying the control electrode within the semiconductor layer;
• a first epitaxial stressor overlying the semiconductor layer and adjacent to a first side of the channel, the first epitaxial stressor having a first in-situ current electrode doping profile;
• a second epitaxial stressor overlying the semiconductor layer and adjacent to a second side of the channel opposite the first side of the channel, the second epitaxial stressor having the first in-situ current electrode doping profile;
• a third epitaxial stressor overlying the first epitaxial stressor and adjacent the first side of the channel, the third epitaxial stressor having a second in-situ current electrode doping profile that differs from the first in-situ current electrode doping profile by having a greater first conductivity type in-situ current electrode doping concentration;
• a fourth epitaxial stressor overlying the second epitaxial stressor adjacent the second side of the channel, the fourth epitaxial stressor having the second in-situ current electrode doping profile;
• wherein a first current electrode and a second current electrode of the transistor include at least a portion of the third epitaxial stressor and the fourth epitaxial stressor, respectively.