Method and Apparatus for Packaging an Integrated Chip and Antenna

Abstract

In an illustrative embodiment, an apparatus includes at least one antenna structure located on a first surface of a first substrate; at least one pad located on the first surface of the first substrate; and at least one via traversing the first substrate and thereby connecting the at least one pad located on the first surface of the first substrate to at least one pad located on a second surface. The at least one pad located on the first surface of the first substrate is operatively coupleable to at least one pad located on a surface of an integrated circuit and the at least one pad located on the second surface is operatively coupleable to at least one pad located on a surface of a printed circuit board. The at least one via is thereby operative to couple the at least one pad located on the surface of the integrated circuit and the at least one pad located on the surface of the printed circuit board.

Dependencies are inferred from the claim text.