Enhanced ac immunity in ground fault detection
AssigneeADC DSL Systems, Inc.
InventorsWilliam J. Fox, Michael Carter
Life of this patent
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Abstract
A method for reducing the occurrence of false ground fault detections in a central office terminal is provided. The method includes generating a no-fault signal when no ground current is detected, delaying generation of a fault signal when ground current is detected at least for the duration of an expected pulse in AC induced signal, and when the ground current persists for a sufficient period, generating a signal indicating a fault condition.
Claims14
A method for reducing the occurrence of false ground fault detections in a central office terminal, the method comprising:
- generating a no-fault signal when no ground current is detected;
- delaying generation of a fault signal when ground current is detected at least for the duration of an expected pulse in AC induced signal;
- and
- when the ground current persists for a sufficient period, generating a signal indicating a fault condition.
A circuit for providing AC immunity to a ground fault detector in a central office terminal, the circuit comprising:
- a comparator having first and second inputs and providing an output;
- a reference voltage coupled to one input of the comparator;
- a capacitor, coupled to the other input of the comparator;
- a first path for charging the capacitor to a first state when the ground fault detector indicates no ground fault;
- and
- a second path for discharging the capacitor at a slower rate than the charging in the first path in response to a signal level corresponding to a fault detection;
- wherein the second path providing immunity to AC signals that alternate between levels that correspond to fault and no-fault conditions.
A method for enhancing the output of a ground fault detection circuit, the method comprising:
- detecting a signal from the ground fault detection circuit indicating a condition with no ground fault;
- rapidly charging a capacitor to a level that indicates the detected condition;
- comparing the capacitor voltage with a reference voltage;
- producing an enhanced output for the ground fault detection signal indicating the no ground fault condition;
- receiving a subsequent signal from the ground fault detector indicating a possible ground fault condition;
- and
- slowly discharging the capacitor in response to the possible ground fault condition at a rate such that the risk of the capacitor discharging to a level to change the enhanced output to indicate a ground fault is reduced when the subsequent signal is an AC induced signal.
An AC immunity circuit for a ground fault detection circuit of a central office terminal, the AC immunity circuit comprising:
- a comparator;
- a reference voltage that differentiates between a ground fault and a normal operating condition;
- and
- a pulse extender circuit, adapted to receive a signal from the ground fault detection circuit, the pulse extender adapted to extend the duration of an AC induced signal at a level indicative of a no-fault condition over a time of at least one pulse in the AC induced signal.
An AC immunity circuit for a ground fault detection circuit of a central office terminal, the AC immunity circuit comprising:
- means for generating a signal indicating a potential ground fault current;
- means for generating a reference voltage;
- means for comparing the signal indicating a potential ground fault current with the reference voltage;
- and
- means for extending pulses in the signal indicating a potential ground fault current to reduce the impact of AC induced currents on the ground fault detection.
Dependencies are inferred from the claim text.