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US 2009/0015309 A1Published application
Data output clock signal generating apparatus and semiconductor integrated circuit with the same
AssigneeHynix Semiconductor Inc.
InventorBok Rim Ko
Life of this patent
Estimating the term…
Abstract
A data clock control apparatus includes a bias voltage generator configured to receive a plurality of test mode signals and a plurality of fuse signals and to generate a bias voltage to secure a predetermined potential difference from an external driving power supply, and a clock signal controller configured to receive the bias voltage and to buffer an external clock signal and outputs a data output clock signal.
Claims20
A data clock control apparatus comprising:
- a bias voltage generator configured to receive a plurality of test mode signals and a plurality of fuse signals and to generate a bias voltage to ensure a predetermined potential difference from an external driving power supply;
- and
- a clock signal controller configured to receive the bias voltage and to buffer an external clock signal to output a data output clock signal.
A semiconductor integrated circuit comprising:
- a data output clock generating unit to which a bias voltage is applied that is generated in response to a plurality of test mode signals and a plurality of fuse signals, the data output clock generating unit configured to buffer an external clock signal, and output a data output clock signal the bias voltage having a predetermined potential difference from an external driving power supply;
- and
- a data output buffer unit configured to output data in synchronization with the data output clock signal and to output the data stably even though a voltage of an external driving power supply is changed.
Dependencies are inferred from the claim text.