Local skew detecting circuit for semiconductor memory apparatus
AssigneeHynix Seminconductor, Inc.
InventorHong-Sok Choi
Life of this patent
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Abstract
A local skew detecting circuit for a semiconductor integrated circuit includes a reference delay block that receives a test signal and generates a reference delay signal by delaying the test signal by a predetermineddelay time, and a first timing detecting block coupled with the reference delay block, the first timing detecting block configured to receive the test signal, generate a first delay signal by delaying the test signal by the same predetermined delay time, and detect an enable timing order of the reference delay signal and the first delay signal to generate a first detection signal.
Claims16
A local skew detecting circuit for a semiconductor memory apparatus, comprising:
- a reference delay block configured to receive a test signal and generate a reference delay signal by delaying the test signal by a delay time;
- and
- a first timing detecting block coupled with the reference delay block, the first timing detecting block configured to receive the test signal, generate a first delay signal by delaying the test signal by the delay time, and detect an enable timing order of the reference delay signal and the first delay signal to generate a first detection signal.
Dependencies are inferred from the claim text.