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US 2009/0014857 A1Published application
Semiconductor wafer structure
AssigneeInfineon Technologies AG
InventorErich Hufgard
Life of this patent
Estimating the term…
Abstract
One embodiment provides a semiconductor wafer structure including a semiconductor wafer and a spacer layer. The semiconductor wafer includes active areas. The spacer layer is configured to provide spacing between the semiconductor dice in a stacked die package and the spacer layer is disposed on one side of the semiconductor wafer.
Claims38
A semiconductor wafer structure, comprising:
- a semiconductor wafer including active areas;
- and
- a spacer layer configured to provide spacing between semiconductor dice in a stacked die package, wherein the spacer layer is disposed on one side of the semiconductor wafer.
A semiconductor device, comprising:
- a semiconductor die from a semiconductor wafer including active areas;
- and
- a spacer on the semiconductor die, wherein the spacer is a singulated piece from a spacer layer disposed on one side of the semiconductor wafer.
A stacked die package, comprising:
- a first semiconductor die from a semiconductor wafer including active areas;
- a second semiconductor die;
- and
- a spacer disposed on the first semiconductor die and configured to provide spacing between the first semiconductor die and the second semiconductor die in the stacked die package, wherein the spacer is a singulated piece of a spacer layer disposed on one side of the semiconductor wafer.
1 more element
A semiconductor structure, comprising:
- means for spacing semiconductor dice in a stacked die package disposed on one side of a semiconductor wafer including active areas.
A method of packaging semiconductor dice, comprising:
- providing semiconductor dice in a semiconductor wafer including active areas defining a topology;
- and
- disposing a spacer layer on one side of the semiconductor wafer.
A method of providing spacers in stacked die packages, comprising:
- providing semiconductor dice in a semiconductor wafer including active areas;
- disposing a spacer layer on one side of the semiconductor wafer;
- and
- patterning the spacer layer on the semiconductor wafer.
1 more element
Dependencies are inferred from the claim text.