Mixed Wire Semiconductor Lead Frame Package

A semiconductor package comprising:

• a lead frame comprising a die pad, a plurality of first leadfingers and a plurality of second leadfingers, each including a landing pad on its inner portion;
• a semiconductor chip including integrated circuits and chip contact pads on its upper active surface, the semiconductor chip being attached to the die pad by its rear passive surface;
• a plurality of first bond wires comprising a first electrically conductive material, each extending between a chip contact pad and a landing pad of the plurality of first leadfingers;
• a plurality of second bond wires comprising a second electrically conductive material, each extending between a chip contact pad and a second leadfinger;
• a plastic mould mass encapsulating the semiconductor chip, the pluralities of first and second bond wires and inner portions of the pluralities of first leadfingers and second leadfingers;
• and
• a plurality of first electrically conducting means, a first electrically conducting means being attached to the landing pad of each of the plurality of second leadfingers, and a second bond wire being attached to the first electrically conducting means.

A semiconductor package comprising:

• a lead frame comprising a die pad, a plurality of first leadfingers and a plurality of second leadfingers, each including a landing pad on its inner portion;
• at least two semiconductor chips including integrated circuits and chip contact pads on their upper active surfaces attached to the die pad;
• a plurality of first bond wires comprising a first electrically conductive material, each extending between a chip contact pad and a landing pad of the plurality of first leadfingers,
• a plurality of second bond wires comprising a second electrically conductive material, each extending between a chip contact pad and a second leadfinger;
• a plurality of third bond wires comprising a third electrically conductive material, extending between the semiconductor chips;
• a plastic mould mass encapsulating the semiconductor chip, the pluralities of first, second and third bond wires and inner portions of the pluralities of first leadfingers and second leadfingers;
• and
• a plurality of first electrically conducting means, a first electrically conducting means being attached to the landing pad of each of the plurality of second leadfingers, and a second bond wire is attached to the first electrically conducting means.

A method to assemble a semiconductor package comprising:

• providing a lead frame including a die pad, a plurality of first leadfingers and a plurality of second leadfingers;
• depositing a landing pad on the inner portion of each first leadfinger and each second leadfinger;
• attaching a semiconductor chip, including integrated circuits and a plurality of chip contact pads on its upper active surface, to the die pad;
• forming a plurality of first electrically conducting means on the landing pads of the plurality of second leadfingers;
• forming first bond connections between the chip contact pads and landing pads of the plurality of first leadfingers with first bond wires;
• forming second bond connections between the chip contact pads and electrically conducting means of the plurality of second leadfingers with second bond wires;
• and
• encapsulating the semiconductor chip, the first and second bond wires and inner ends of leadfingers in a plastic mould material.

A method to assemble a semiconductor package comprising:

• providing a lead frame including a die pad, a plurality of first leadfingers and a plurality of second leadfingers;
• depositing a landing pad on the inner portion of each first leadfinger and each second leadfinger;
• attaching at least two semiconductor chips including integrated circuits and chip contact pads on the upper active surface to the die pad;
• forming a plurality of first electrically conducting means on the landing pads of each of the plurality of second leadfingers;
• forming first bond connections between the chip contact pads and landing pads of the plurality of first leadfingers with first bond wires;
• forming second bond connections between the chip contact pads and electrically conducting means of the plurality of second leadfingers with second bond wires;
• forming third bond connections between the semiconductor chips with third bond wires;
• and
• encapsulating the semiconductor chips, the first second and third bond wires and inner ends of leadfingers in a plastic mould material.