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US 2009/0014841 A1Published application
Semiconductor device and method for manufacturing
AssigneeKabushiki Kaisha Toshiba
InventorsKosuke YANAGIDAIRA, Takuya Futatsuyama, Toshiya Kotani
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Abstract
A first region having a first pattern which includes a first minimum dimension, a second region having a second pattern which includes a second minimum dimension larger the first minimum dimension, the second region being arranged adjacent to the first region, wherein a boundary between the first region and the second region is sectioned by a width which is twice of more of a minimum dimension which exists in an adjacent region.
Claims17
A semiconductor device comprising:
- a first region having a first pattern, said first pattern having a first minimum dimension;
- and
- a second region having a second pattern, said second pattern having a second minimum dimension which is larger than said first minimum dimension, said second region being arranged adjacent to said first region, a boundary of said first region and said second region being sectioned by a width twice or more of a minimum dimension which exists in an adjacent region.
A semiconductor device comprising:
- a first region having a first pattern, said first pattern having a first minimum dimension;
- a second region having a second pattern, said second pattern having a second minimum dimension which is larger than said first minimum dimension, said second region being arranged adjacent to said first region;
- and
- a third region having a third pattern, said third pattern having a third minimum dimension which is larger than said second minimum dimension, said third region being arranged adjacent to said first region or said second region, a boundary of said first region, said second region and said third region being one of the following;
- (1) a boundary of each of said first region, said second region and said third region being sectioned by a width which is twice or more of a minimum dimension which exists in a region adjacent to said boundary.
- (2) a boundary of said first region and said third region with said second region is sectioned by a width which is twice or more of a minimum dimension which exists in a region adjacent to said boundary.
- (3) a boundary of said first region and said second region with said third region is sectioned by a width which is twice or more of a minimum dimension which exists in a region adjacent to said boundary.
4 more elements
A semiconductor device comprising;
- a boundary of a region of a first layer;
- a boundary of a region of a second layer, said second layer being arranged on a layer above said first layer;
- and
- a boundary of an region of said first layer and a boundary of a region of said second layer each being alternately arranged from a lower layer to an upper layer respectively, and a boundary of an region of said first layer and a boundary of a region of said second layer being sectioned by a width twice of more of a minimum dimension which exists in an adjacent region.
1 more element
Dependencies are inferred from the claim text.