Semiconductor device and method for manufacturing the same

A semiconductor device comprising:

• a bonding layer over a substrate having an insulating surface;
• a first single-crystal semiconductor layer including a first channel formation region and a first impurity region over the bonding layer;
• a first gate insulating layer over the first single-crystal semiconductor layer;
• a gate electrode over the first gate insulating layer;
• a first interlayer insulating layer over the first gate insulating layer;
• a second gate insulating layer over the gate electrode and the first interlayer insulating layer;
• a second single-crystal semiconductor layer including a second channel formation region and a second impurity region over the second gate insulating layer;
• a second interlayer insulating layer over the second single-crystal semiconductor layer;
• and
• a plurality of wirings electrically connected to at least one of the first single-crystal semiconductor layer and the second single-crystal semiconductor layer over the second interlayer insulating layer;
• wherein the first channel formation region, the gate electrode, and the second channel formation region are overlapped with each other, wherein a first opening is provided in the first gate insulating layer, the first interlayer insulating layer, the second gate insulating layer, and the second interlayer insulating layer,wherein a second opening is provided in the second interlayer insulating layer, and wherein the plurality of wirings are provided over at least one of the first opening and the second opening.

A method for manufacturing a semiconductor device comprising the steps of:

• forming a first damaged region in a first single-crystal semiconductor substrate;
• bonding the first single-crystal semiconductor substrate and a substrate having an insulating surface with a bonding layer interposed therebetween;
• separating the first single-crystal semiconductor substrate with a first single-crystal semiconductor layer left over the substrate having the insulating surface;
• forming a first gate insulating layer over the first single-crystal semiconductor layer;
• forming a gate electrode over the first gate insulating layer, wherein the gate electrode is overlapped with the first single-crystal semiconductor layer;
• forming a first interlayer insulating layer over the gate electrode;
• planarizing an upper surface of the first interlayer insulating layer;
• forming a second gate insulating layer over the gate electrode and the first interlayer insulating layer;
• forming a second damaged region in a second single-crystal semiconductor substrate;
• bonding the second single-crystal semiconductor substrate and the substrate having the insulating surface with the second gate insulating layer interposed therebetween;
• and
• separating the second single-crystal semiconductor substrate with a second single-crystal semiconductor layer left over the second gate insulating layer, wherein the second single-crystal semiconductor layer is overlapped with the gate electrode and the first single-crystal semiconductor layer.

A method for manufacturing a semiconductor device comprising the steps of:

• forming a first damaged region in a first single-crystal semiconductor substrate;
• bonding the first single-crystal semiconductor substrate and a substrate having an insulating surface with a bonding layer interposed therebetween;
• separating the first single-crystal semiconductor substrate with a first single-crystal semiconductor layer left over the substrate having the insulating surface;
• forming a first gate insulating layer over the first single-crystal semiconductor layer;
• forming a gate electrode over the first gate insulating layer, wherein the gate electrode is overlapped with the first single-crystal semiconductor layer;
• forming a first interlayer insulating layer over the gate electrode;
• planarizing an upper surface of the first interlayer insulating layer;
• forming a second gate insulating layer over the gate electrode and the first interlayer insulating layer;
• forming a second damaged region in a second single-crystal semiconductor substrate;
• bonding the second single-crystal semiconductor substrate and the substrate having the insulating surface with the second gate insulating layer interposed therebetween;
• separating the second single-crystal semiconductor substrate with a second single-crystal semiconductor layer left over the second gate insulating layer, wherein the second single-crystal semiconductor layer is overlapped with the gate electrode and the first single-crystal semiconductor layer;
• forming a second interlayer insulating layer over the second single-crystal semiconductor layer;
• forming a first opening in the first gate insulating layer, the first interlayer insulating layer, the second gate insulating layer, and the second interlayer insulating layer and forming a second opening in the second interlayer insulating layer, and forming a plurality of wirings over at least one of the first opening and the second opening.