Nonvolatile semiconductor memory element and nonvolatile semiconductor memory device

A nonvolatile semiconductor memory element comprising:

• a semiconductor substrate;
• a plate-like semiconductor region formed above the semiconductor substrate and containing an impurity of a first conductivity type;
• source and drain regions formed at a distance from each other in a longitudinal direction of the plate-like semiconductor region, and containing an impurity of a second conductivity type;
• a channel region provided in the plate-like semiconductor region located between the source region and the drain region;
• a first insulating layer covering a pair of faces of the channel region facing each other;
• a charge accumulating layer formed on a face of the first insulating layer on the opposite side from the channel region, and having a stacked structure including at least three conductor films and inter-conductor insulating films provided between the adjacent conductor films, a dielectric constant of any one of the inter-conductor insulating films located at a greater distance from the channel region being higher than a dielectric constant of any one of the inter-conductor insulating films closer to the channel region, a dielectric constant of each of the inter-conductor insulating films being lower than a dielectric constant of the first insulating layer;
• a second insulating layer formed on a face of the charge accumulating layer on the opposite side from the first insulating layer, and having a higher dielectric constant than the dielectric constant of any one of the inter-conductor insulating films;
• and
• a conductor layer formed on a face of the second insulating layer on the opposite side from the charge accumulating layer.

A nonvolatile semiconductor memory element comprising:

• a semiconductor substrate;
• a semiconductor region formed in the semiconductor substrate and containing an impurity of a first conductivity type;
• source and drain regions formed at a distance from each other on the semiconductor region, and containing an impurity of a second conductivity type;
• a first insulating layer formed on a portion of the semiconductor region, the portion being located between the source and drain regions;
• a charge accumulating layer formed on the first insulating layer, and having a stacked structure including at least two stacked charge storing insulating films, a dielectric constant of any one of the charge storing insulating films located at a greater distance from the semiconductor substrate being higher than a dielectric constant of any one of the charge storing insulating films closer to the semiconductor substrate, a dielectric constant of each of the charge storing insulating films being lower than a dielectric constant of the first insulating layer;
• a second insulating layer formed on the charge accumulating layer, and having a higher dielectric constant than the dielectric constant of any one of the charge storing insulating films;
• and
• a conductor layer formed on the second insulating layer.

A nonvolatile semiconductor memory element comprising:

• a semiconductor substrate;
• a plate-like semiconductor region formed on the semiconductor substrate and containing an impurity of a first conductivity type;
• source and drain regions formed at a distance from each other in a longitudinal direction of the plate-like semiconductor region, and containing an impurity of a second conductivity type;
• a channel region provided in the plate-like semiconductor region located between the source region and the drain region;
• a first insulating layer covering a pair of faces of the channel region facing each other;
• a charge accumulating layer formed a face of the first insulating layer on the opposite side from the channel region, and having a stacked structure including at least two stacked charge storing insulating films, a dielectric constant of any one of the charge storing insulating films located at a greater distance from the channel region being higher than a dielectric constant of any one of the charge storing insulating films closer to the channel region, a dielectric constant of each of the charge storing insulating films being lower than a dielectric constant of the first insulating layer;
• a second insulating layer formed on a face of the charge accumulating layer on the opposite side from the first insulating layer, and having a higher dielectric constant than the dielectric constant of any one of the charge storing insulating films;
• and
• a conductor layer formed on a face of the second insulating layer on the opposite side from the charge accumulating layer.