Method, system, and computer program product for hierarchical integrated circuit repartitioning

A method for hierarchical integrated circuit repartitioning, comprising:

• receiving parent level placement data for one or more interconnecting elements;
• designating at least one child to receive a pushdown of the one or more interconnecting elements from the parent level;
• and
• performing for each child designated to receive the pushdown of the one or more interconnecting elements:
• determining a physical coverage area of the child;
• expanding the physical coverage area of the child by a user-defined amount;
• identifying which of the one or more interconnecting elements within the physical coverage area of the child to pushdown into the child via tracing between the child and each interconnecting element within the physical coverage area of the child to verify that the child is the only non-interconnecting element connected to one of an input and an output of each interconnecting element, wherein the verifying results in interconnecting element identification;
• generating an interconnecting element pushdown list for the child, including wiring layer information;
• determining whether any of the identified one or more interconnecting elements are part of a bus;
• reporting a partial bus pushdown when fewer than all interconnecting elements of the bus are pushed down into a common child;
• and
• outputting the interconnecting element pushdown list.

A system for hierarchical integrated circuit repartitioning, comprising:

• a data storage device holding design data for a hierarchical integrated circuit;
• and
• a host system in communication with the data storage device, the host system executing a hierarchical integrated circuit repartitioning tool (HICRT), the HICRT performing:
• receiving parent level placement data for one or more interconnecting elements from the design data;
• designating at least one child to receive a pushdown of the one or more interconnecting elements from the parent level;
• and
• performing for each child designated to receive the pushdown of the one or more interconnecting elements:
• determining a physical coverage area of the child;
• identifying which of the one or more interconnecting elements within the physical coverage area of the child to pushdown into the child;
• generating an interconnecting element pushdown list for the child, including wiring layer information;
• and
• outputting the interconnecting element pushdown list.

A computer program product for hierarchical integrated circuit repartitioning, the computer program product comprising:

• a storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for implementing a method, the method comprising:
• receiving parent level placement data for one or more interconnecting elements;
• designating at least one child to receive a pushdown of the one or more interconnecting elements from the parent level;
• and
• performing for each child designated to receive the pushdown of the one or more interconnecting elements:
• determining a physical coverage area of the child;
• identifying which of the one or more interconnecting elements within the physical coverage area of the child to pushdown into the child;
• generating an interconnecting element pushdown list for the child, including wiring layer information;
• and
• outputting the interconnecting element pushdown list.