Method for checking constraints equivalence of an integrated circuit design
AssigneeAtrenta, Inc.
InventorsSridhar Gangadharan, Manish Goel, Pratyush K. Prasoon, Suraj Bharech
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Abstract
The equivalence of two or more constraint files of an integrated circuit (IC) design are checked. The comparison is performed between files at the same stage of design, files that correspond to different stages of the design flow, or between top-level and block-level constraint files.
Claims28
A method for checking constraints equivalence of an integrated circuit (IC) design, comprising:
- receiving a group of constraint files, wherein the group of constraint files includes at least a first constraint file and a second constraint file;
- determining whether the first constraint file and the second constraint file are clean;
- selecting a pair of constraints from the first constraint file and the second constraint file;
- and
- for each pair of constraints, performing checks to determine equivalency of the pair of constraints.
A computer program product for enabling a computer system to perform operations for an integrated circuit (IC) design method for checking constraints equivalence of an integrated circuit (IC) design, the computer program product having computer instructions on a computer readable medium, the operations comprising:
- receiving a group of constraint files, wherein the group of constraint files includes at least a first constraint file and a second constraint file;
- determining whether the first constraint file and the second constraint file are clean;
- selecting a pair of constraints from the first constraint file and the second constraint file;
- and
- for each pair of constraints, performing checks to determine equivalency of the pair of constraints.
Dependencies are inferred from the claim text.