Information processing system
AssigneeKabushiki Kaisha Toshiba
InventorsSeiji MAEDA, Hidenori Matsuzaki, Yusuke Shirota, Kazuya Kitsunai
Life of this patent
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Abstract
An information processing system includes a first processor that accesses a first memory, a second processor that accesses a second memory, and a data transfer unit for executing data transfer between the first memory and the second memory. The first processor executes functions of translating an instruction out of instructions included in the program except a memory access instruction into an instruction for the second processor and translating the memory access instruction into an instruction sequence containing a call instruction of the program to transfer the access data on the first memory to the second memory via a data transfer unit.
Claims6
An information processing system comprising:
- a first processor that executes instructions belonging to a first instruction set;
- a second processor that executes instructions belonging to a second instruction set;
- a first memory that stores a translation target program that is designed based on the first instruction set, the first memory being unaccessible by the second processor;
- a second memory that is accessible by the second processor;
- and
- a data transfer unit that transfers data between the first memory and the second memory,
- wherein the first processor operates to:
- read the translation target program from the first memory;
- determine each of instructions included in the translation target program is whether a memory access instruction;
- translate the instructions that are determined to be not the memory access instruction into instructions belonging to the second instruction set;
- and
- translate the instructions that are determined to be the memory access instruction into instruction sequence including a call instruction calling a data transfer library that is stored in the second memory, and
- wherein the second processor operates to:
- execute the translated instructions that belong to the second instruction set;
- and
- controls the data transfer unit to transfer the data between the first memory and the second memory in accordance with the instruction sequence.
An information processing system comprising:
- a first processor that executes instructions belonging to a first instruction set;
- a second processor that executes instructions belonging to a second instruction set;
- a first memory that stores a translation target program that is designed based on the first instruction set, the first memory being unaccessible by the second processor;
- a second memory that is accessible by the second processor;
- and
- a data transfer unit that transfers data between the first memory and the second memory,
- wherein the second processor operates to:
- control the data transfer unit to transfer the translation target program from the first memory to the second memory;
- read the translation target program from the second memory;
- determine each of instructions included in the translation target program is whether a memory access instruction;
- translate the instructions that are determined to be not the memory access instruction into instructions belonging to the second instruction set;
- translate the instructions that are determined to be the memory access instruction into instruction sequence including a call instruction calling a data transfer library that is stored in the second memory;
- execute the translated instructions that belong to the second instruction set;
- and
- control the data transfer unit to transfer the data between the first memory and the second memory in accordance with the instruction sequence.
An information processing system comprising:
- a first processor that executes instructions belonging to a first instruction set;
- a second processor that executes instructions belonging to a second instruction set;
- a first memory that stores a translation target program that is designed based on the first instruction set, the first memory being unaccessible by the second processor;
- a second memory that is accessible by the second processor;
- a data transfer unit that transfers data between the first memory and the second memory;
- and
- a performance monitor that monitors processing loads of the first processor and the second processor and controls the first processor and the second processor to perform one of process [A] and [B] in accordance with the monitored processing loads,
- wherein as the process [A],
- the first processor operates to:
- read the translation target program from the first memory;
- determine each of instructions included in the translation target program is whether a memory access instruction;
- translate the instructions that are determined to be not the memory access instruction into instructions belonging to the second instruction set;
- and
- translate the instructions that are determined to be the memory access instruction into instruction sequence including a call instruction calling a data transfer library that is stored in the second memory, and the second processor operates to:
- execute the translated instructions that belong to the second instruction set;
- and
- control the data transfer unit to transfer the data between the first memory and the second memory in accordance with the instruction sequence, and
- wherein as the process [B],
- the second processor operates to:
- control the data transfer unit to transfer the translation target program from the first memory to the second memory;
- read the translation target program from the second memory;
- determine each of instructions included in the translation target program is whether a memory access instruction;
- translate the instructions that are determined to be not the memory access instruction into instructions belonging to the second instruction set;
- translate the instructions that are determined to be the memory access instruction into instruction sequence including a call instruction calling a data transfer library that is stored in the second memory;
- execute the translated instructions that belong to the second instruction set;
- and
- controls the data transfer unit to transfer the data between the first memory and the second memory in accordance with the instruction sequence.
A method for an information processing system including:
- a first processor that executes instructions belonging to a first instruction set;
- a second processor that executes instructions belonging to a second instruction set;
- a first memory that is unaccessible by the second processor;
- a second memory that is accessible by the second processor;
- and
- a data transfer unit that transfers data between the first memory and the second memory,
- wherein the method comprises:
- controlling the first processor to:
- read the translation target program from the first memory;
- determine each of instructions included in a translation target program is whether a memory access instruction, the translation target program being stored in the first memory and designed based on the first instruction set;
- translate the instructions that are determined to be not the memory access instruction into instructions belonging to the second instruction set;
- and
- translate the instructions that are determined to be the memory access instruction into instruction sequence including a call instruction calling a data transfer library that is stored in the second memory;
- and
- controlling the second processor to:
- execute the translated instructions that belong to the second instruction set;
- and
- controls the data transfer unit to transfer the data between the first memory and the second memory in accordance with the instruction sequence.
A computer-readable recording medium that stores a program for causing an information processing system to operate in accordance with a procedure,
- wherein the information processing system includes:
- a first processor that executes instructions belonging to a first instruction set;
- a second processor that executes instructions belonging to a second instruction set;
- a first memory that is unaccessible by the second processor;
- a second memory that is accessible by the second processor;
- and
- a data transfer unit that transfers data between the first memory and the second memory,
- wherein the procedure comprises:
- controlling the first processor to:
- read the translation target program from the first memory;
- determine each of instructions included in a translation target program is whether a memory access instruction, the translation target program being stored in the first memory and designed based on the first instruction set;
- translate the instructions that are determined to be not the memory access instruction into instructions belonging to the second instruction set;
- and
- translate the instructions that are determined to be the memory access instruction into instruction sequence including a call instruction calling a data transfer library that is stored in the second memory;
- and
- controlling the second processor to:
- execute the translated instructions that belong to the second instruction set;
- and
- controls the data transfer unit to transfer the data between the first memory and the second memory in accordance with the instruction sequence.
Dependencies are inferred from the claim text.