Fast writing non-volatile memory
AssigneeSTMicroelectronics S.r.l.
InventorsFrancesco La Rosa, Antonino Conte
Life of this patent
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Abstract
A method writes data in a non-volatile memory comprising memory cells that are erased before being written. The method comprises the steps of providing a main non-volatile memory area comprising target pages, providing an auxiliary non-volatile memory area comprising auxiliary pages, providing a look-up table to associate to an address of invalid target page an address of valid auxiliary page, and, in response to a command for writing a piece of data in a target page writing the piece of data as well as the address of the target page in a first erased auxiliary page, invalidating the target page, and updating the look-up table.
Claims34
A method for writing data, the method comprising:
- providing a non-volatile main memory area comprising target pages;
- providing a non-volatile auxiliary memory area comprising auxiliary pages;
- providing a look-up table to associate addresses of invalid target pages with addresses of valid auxiliary pages;
- and
- in response to a command for writing a first piece of data in a first target page of the target pages of the main memory area:
- writing the first piece of data as well as an address of the first target page in an erased first auxiliary page;
- invalidating the first target page;
- and
- updating the look-up table to associate the address of the first target page with the first auxiliary page.
A memory system comprising:
- comprising:
- a non-volatile main memory area comprising target pages;
- a non-volatile auxiliary memory area comprising auxiliary pages;
- a look-up table structured to associate addresses of invalid target pages with addresses of valid auxiliary pages;
- and
- a control unit configured to, in response to a command for writing a first piece of data in a first target page of the target pages in the main memory area, write the first piece of data as well as an address of the first target page in an erased first auxiliary page, invalidate the target page and update the look-up table to associate the address of the first target page with the first auxiliary page.
An integrated circuit, comprising:
- a memory system that includes:
- a non-volatile main memory area comprising target pages;
- a non-volatile auxiliary memory area comprising auxiliary pages;
- a look-up table structured to associate addresses of invalid target pages with addresses of valid auxiliary pages;
- and
- a control unit configured to, in response to a command for writing a first piece of data in a first target page of the target pages in the main memory area, write the first piece of data as well as an address of the first target page in an erased first auxiliary page, invalidate the target page and update the look-up table to associate the address of the first target page with the first auxiliary page.
A memory system, comprising:
- a non-volatile main memory area comprising target pages;
- a non-volatile auxiliary memory area comprising auxiliary pages;
- a look-up table to associate addresses of invalid target pages with addresses of valid auxiliary pages;
- and
- control means for, in response to a command for writing a first piece of data in a first target page of the target pages of the main memory area:
- writing the first piece of data as well as an address of the first target page in an erased first auxiliary page;
- invalidating the first target page;
- and
- updating the look-up table to associate the address of the first target page with the first auxiliary page.
Dependencies are inferred from the claim text.